HD66760 Datasheet, PDF (11/105 Pages) Hitachi Semiconductor – 104 X 80-dot Graphics LCD Controller/Driver for 256 Colors

Block Function Description
HD66760
System Interface
The HD66760 has four high-speed system interfaces: an 80-system 16-bit/8-bit bus, a 68-system 16-bit/8-bit
bus, an I2C bus interface and a clock synchronized serial interface. The interface mode is selected by the IM2-
0 pins.
The HD66760 has three 16-bit registers: an index register (IR), a write data register (WDR), and a read data
register (RDR). The IR stores index information from the control registers and the GRAM. The WDR
temporarily stores data to be written into control registers and the GRAM, and the RDR temporarily stores
data read from the GRAM. Data written into the GRAM from the MPU is first written into the WDR and then
is automatically written into the GRAM by internal operation. Data is read through the RDR when reading
from the GRAM, and the first read data is invalid and the second and the following data are normal. When a
logic operation is performed inside of the HD66760 by using the display data set in the GRAM and the data
written from the MPU, the data read through the RDR is used. Accordingly, the MPU does not need to read
data twice nor to fetch the read data into the MPU. This enables high-speed processing.
Execution time for instruction excluding oscillation start is 0 clock cycle and instructions can be written in
succession.
Table 2 Register Selection
80-series Bus
WR Bits RD Bits
0
1
1
0
0
1
1
0
68- series
Bus
R/W Bits
0
1
0
1
RS Bits
0
0
1
1
Operations
Writes indexes into IR
Reads internal status
Writes into control registers and GRAM through WDR
Reads from GRAM through RDR
Bit Operation
The HD66760 supports the following functions: a swap function that writes the data written from the MPU
into the GRAM by reversing the display position vertically in byte units, a write data mask function that
selects and writes data into the GRAM in bit units, and a logic operation function that performs logic
operations or conditional determination on the display data set in the GRAM and writes into the GRAM. With
the 16-bit bus interface, these functions can greatly reduce the processing loads of the MPU graphics software
and can rewrite the display data in the GRAM at high speed. For details, see the Graphics Operation Function
section.
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