HD66760 Datasheet, PDF (101/105 Pages) Hitachi Semiconductor – 104 X 80-dot Graphics LCD Controller/Driver for 256 Colors

Timing Characteristics
68-system Bus Operation
HD66760
RS
R/W
CS*
E
*2
DB0
to DB15
*2
DB0
to DB15
VIH
VIL1
tASE
VIH
VIL1
tAHE
VIL1
VIH
VIL1
tEr
*1
PWEH
VIH
VIL1
tEf
tDSWE
VIL1
PWEL
tCYCE
tHE
VIH
VIL1 ^{Write data}
VIH
VIL1
tDDRE
tDHRE
VOH1
VOL1 ^{Read data}
VOH1
VOL1
VIL1
Note: 1. PWEH is specified in the overlapped period when CS* is low and E is high.
2. Parallel data transfer is enabled on the DB15-8 pins when the 8-bit bus interface is used.
Fix tje DB7-0 pins to Vcc or GND.
Figure 67 68-system Bus Timing