HD74AC Datasheet, PDF (33/52 Pages) Hitachi Semiconductor – HD74AC Series Common Information

Design Considerations
1. Interfacing
FACT devices have outputs which combine balanced CMOS outputs with high current line driving
capability. Each standard output is guaranteed to source or sink 24 mA of current at worst case conditions.
This allows FACT circuits to drive more loads than standard advanced Schottky parts; FACT can directly
drive ALS, AS, LS, HC, and HCT devices.
V_CC
AC/ACT
NMOS,
CMOS or
TTL
Figure 1 Interfacing FACT to NMOS, CMOS and TTL
FACT devices can be directly driven by both NMOS and CMOS families, as shown in figure 1, operating
at the same rail potential without special considerations. This is possible due to the low input loading of
FACT product, guaranteed to be less than 1 µA per input.
Some older technologies, including all existing TTL families, will not be able to drive FACT circuits
directly; this is due to inadequate high level capability, which is guaranteed to 2.4 V. There are two simple
approaches to the TTL-to-FACT interface problem. A TTL-to-CMOS converter can be constructed
employing a resistor pull-up to V_CC of approximately 4.7 kΩ, which is depicted in figure 2. The correct
high level is seen by the CMOS device while not loading down the TTL driver.
TTL
AC
Figure 2 V_IH Pull-Up on TTL Outputs
Unfortunately, there will be designs where including a pull-up resistor will not be acceptable. In these
cases, such as a terminated TTL bus, Hitachi has designed devices which offer thresholds that are TTL-
compatible (figure 3). These interfaces tend to be slightly slower than their CMOS-level counter-parts due
to an extra buffer stage required for level conversion.
V_CC
TTL
ACT
Figure 3 TTL Interfacing to HD74ACT
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