HD74AC Datasheet, PDF (12/52 Pages) Hitachi Semiconductor – HD74AC Series Common Information

Input
SET
D
Q
’74
CLK Q
CLR
FACT Descriptions and Family Characteristics
V_CC
SET
D
Q
’74
CLK Q
CLR
SET
D
Q
’74
CLK Q
CLR
SET
D
Q
’74
CLK Q
CLR
E1 E2 E3
01 02 03 04
A0 A1 A2
’138
05 06 07 08
’04 Load Devices
Figure 9 Power Demonstration Circuit Schematic
3. The power supply current is measure and recorded at input frequencies of 200 kHz and 1 MHz.
4. The power dissipation capacitance is calculated by solving the two simultaneous equations
P₁ = (C_PD • V_CC2 • f₁) + (I_CC • V_CC)
P₂ = (C_PD • V_CC2 • f₂) + (I_CC • V_CC)
giving
C_PD = (P₁ – P₂)/V_CC2 (f₁ – f₂)
or
C_PD = (I₁ – I₂)/V_CC(f₁ – f₂)
where
I₁ = supply current at f₁ = 200 kHz.
I₂ = supply current at f₂ = 1 MHz
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