HD74AC Datasheet, PDF (11/52 Pages) Hitachi Semiconductor – HD74AC Series Common Information

FACT Descriptions and Family Characteristics
2. Circuit Characteristics
2.1 Power Dissipation
One advantage to using CMOS logic is its extremely low power consumption. During quiescent
conditions, FACT will consume several orders of magnitude less current than its bipolar counterparts. But
DC power consumption is not the whole picture. Any circuit will have AC power consumption, whether it
is built with CMOS or bipolar technologies.
Power consumption of a circuit can be calculated using the formula:
P_D = [(C_L + C_PD) • V_CC • V_S • f] + [I_Q • V_CC]
where:
P_D = power dissipation
C_L = load capacitance
C_PD = device power capacitance
V_CC = power supply
V_S = output voltage swing
f = frequency of operation
I_Q = quiescent current
Power consumption for FACT is dependent on the supply voltage, frequency of operation, internal
capacitance and load. V_S will be V_CC and I_Q can be considered negligible for CMOS. Therefore, the
simplified formula for CMOS is:
P_D = (C_L + C_PD)V_CC2 f
C_PD values for CMOS devices are calculated by measuring the power consumption of a device at two
different frequencies. C_PD is calculated in the following manner.
1. The power supply voltage is set to V_CC = 5.0 VDC.
2. Signal inputs are set up so that as many outputs as possible are switching, giving a worst-case
situation per JEDEC C_PD conditions.
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