MB81F643242B-10FN-X Datasheet, PDF (5/56 Pages) Fujitsu Component Limited. – MEMORY CMOS 4 X 512 K X 32 BIT SYNCHRONOUS DYNAMIC RAM

MB81F643242B-10FN-X Advanced Info (AE0.3E)
s FUNCTIONAL TRUTH TABLE Note *1
COMMAND TRUTH TABLE Note *2, *3, and *4
Function
CKE
Notes Symbol
n-1 n
CS
RAS CAS
WE
A12,
A11
(BA)
A10
(AP)
A9
to
A8
A7
to
A0
Device Deselect
*5 DESL H X H X X X X X X X
No Operation
*5 NOP H X L H H H X X X X
Burst Stop
BST H X L H H L X X X X
Read
*6 READ H X L H L H V L X V
Read with Auto-precharge
*6 READA H X L H L H V H X V
Write
*6 WRIT H X L H L L V L X V
Write with Auto-precharge
*6 WRITA H X L H L L V H X V
Bank Active
*7 ACTV H X L L H H V V V V
Precharge Single Bank
PRE H X L L H L V L X X
Precharge All Banks
PALL H X L L H L X H X X
Mode Register Set
*8, *9 MRS H X L L L L L L V V
Notes: *1.
*2.
*3.
*4.
*5.
*6.
*7.
*8.
*9.
V = Valid, L = Logic Low, H = Logic High, X = either L or H.
All commands assumes no CSUS command on previous rising edge of clock.
All commands are assumed to be valid state transitions.
All inputs are latched on the rising edge of clock.
NOP and DESL commands have the same effect on the part.
READ, READA, WRIT and WRITA commands should only be issued after the corresponding bank has
been activated (ACTV command). Refer to STATE DIAGRAM.
ACTV command should only be issued after corresponding bank has been precharged (PRE or PALL
command).
Required after power up. Refer to POWER-UP INITIALIZATION in page 19.
MRS command should only be issued after all banks have been precharged (PRE or PALL command).
Refer to STATE DIAGRAM.
5