MB81F643242B-10FN-X Datasheet, PDF (42/56 Pages) Fujitsu Component Limited. – MEMORY CMOS 4 X 512 K X 32 BIT SYNCHRONOUS DYNAMIC RAM

MB81F643242B-10FN-X Advanced Info (AE0.3E)
TIMING DIAGRAM – 16 : SELF-REFRESH ENTRY AND EXIT TIMING
CLK
CKE
tSI (min)
Command
NOP ^*1 SELF
tCKSP (min)
tRC (min) ^*4
DON’T CARE
NOP ^{*2 SELFX}
NOP ^*3 Command
Notes: *1. Precharge command (PRE or PALL) should be asserted if any bank is active prior to Self-refresh Entry command (SELF).
*2. The Self-refresh Exit command (SELFX) is latched after tCKSP (min). It is recommended to apply NOP command in
conjunction with CKE.
*3. Either NOP or DESL command can be used during tRC period.
*4. CKE should be held high within one tRC period after tCKSP.
TIMING DIAGRAM – 17 : MODE REGISTER SET TIMING
CLK
Command
MRS
tRSC (min)
NOP or DESL
ACTV
Address
MODE
ROW
ADDRESS
Notes: The Mode Register Set command (MRS) should only be asserted after all banks have been precharged.
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