V2-EVAL Datasheet, PDF (36/64 Pages) Future Technology Devices International Ltd. – Vinculum II Evaluation Board

5.18
Document Reference No.: FT_000247
V2-EVAL Vinculum II Evaluation Board Datasheet Version 2.0
Clearance No.: FTDI#148
VNC2 Daughterboard Connector – J2
1
2
Figure 5.23
VNC2 Daughterboard Connector J2
Schematic Connector
VCN2 Pin No
Signal Name⁽⁴⁴⁾
Pin
32-PIN 48-PIN 64-PIN
V_DSR#
1
-
36
44
V_DCD#
2
-
37
45
V_RI#
3
-
38
46
V_TXDEN
3.3V
4
-
41
47
5
-
-
-
IO
type
Description
IO
Connected to
P1 pin 30 / CN10 pin 6 / CN6 pin 2.
IO
Connected to
P1 pin 31 / CN10 pin 7 / CN6 pin 3.
IO
Connected to
P1 pin 32 / CN10 pin 8 / CN6 pin 4.
IO
Connected to
P1 pin 33 / CN10 pin 9 / CN6 pin 5.
- 3.3V power rail.
3.3V
6
-
-
-
- 3.3V power rail.
GPIO7
7
-
42
48
IO Connected to P1 pin 34 / CN6 pin 6.
GPIO8
8
-
43
49
IO Connected to P1 pin 36 / CN6 pin 7.
GPIO9
9
-
44
50
IO Connected to P1 pin 37 / CN6 pin 8.
SPI_S1_CLK
10
-
-
57
IO Connected to P1 pin 42 / CN7 pin 5.
SPI_S1_MOSI
11
-
-
58
IO Connected to P1 pin 43 / CN7 pin 6.
SPI_S1_MISO
12
-
-
59
IO Connected to P1 pin 44 / CN7 pin 7.
GND
13
-
-
-
- Ground pin.
SPI_S1_CS#
14
-
-
60
IO Connected to P1 pin 45 / CN7 pin 8.
DEBUG_IF
15
11
11
11
IO Debug pin. Connected to P1 pin 4 / CN3 pin 1.
GND
16
-
-
-
- Ground pin.
Notes:
(44) The signal names relate to the labels used on pages 1 & 2 of the V2-EVAL base board schematic. Unless
otherwise stated, the function of the IO signals is set by the user application running on the VNC2.
Table 5.19 Connector J2 Pinout
Copyright © 2010 Future Technology Devices International Limited
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