V2-EVAL Datasheet, PDF (35/64 Pages) Future Technology Devices International Ltd. – Vinculum II Evaluation Board

5.17
Document Reference No.: FT_000247
V2-EVAL Vinculum II Evaluation Board Datasheet Version 2.0
Clearance No.: FTDI#148
VNC2 Daughterboard Connector – J1
1
16
Figure 5.22
VNC2 Daughterboard Connector J1
Schematic Connector
Signal Name⁽⁴³⁾
Pin
3.3V
1
VCN2 Pin No
32-PIN 48-PIN 64-PIN
-
-
-
IO
type
Description
- 3.3V power rail.
3.3V
2
-
-
-
- 3.3V power rail.
GND
USB1DP
USB1DM
SPI_S0_CLK
3
-
-
-
- Ground pin.
4
17
25
33
IO
USB1 transceiver, data line positive connected
to CN1.
5
18
26
34
IO
USB1 transceiver, data line minus connected to
CN1.
6
29
15
51
IO Connected to P1 pin 38 / CN7 pin 1.
SPI_S0_MOSI
7
30
16
52
IO Connected to P1 pin 39 / CN7 pin 2.
SPI_S0_MISO
8
31
18
55
IO Connected to P1 pin 40 / CN7 pin 3.
SPI_S0_CS#
9
32
19
56
IO Connected to P1 pin 40 / CN7 pin 4.
USB2DP
USB2DM
V_TXD
V_RXD
V_RTS#
V_CTS#
V_DTR#
Notes:
(43)
10
20
28
36
IO
USB2 transceiver, data line positive connected
to CN2.
11
21
29
37
IO
USB2 transceiver, data line minus connected to
CN2.
12
23
31
39
IO
Connected to
P1 pin 25 / CN10 pin 1 / CN5 pin 5.
13
24
32
40
IO
Connected to
P1 pin 26 / CN10 pin 2 / CN5 pin 6.
14
25
33
41
IO
Connected to
P1 pin 27 / CN10 pin 3 / CN5 pin 7.
15
26
34
42
IO
Connected to
P1 pin 28 / CN10 pin 4 / CN5 pin 8.
16
-
35
43
IO
Connected to
P1 pin 29 / CN10 pin 5 / CN6 pin 1.
The signal names relate to the labels used on pages 1 & 2 of the V2-EVAL base board schematic. Unless
otherwise stated, the function of the IO signals is be set by the user application running on the VNC2.
Table 5.18 Connector J1 Pinout
Copyright © 2010 Future Technology Devices International Limited
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