K60P144M100SF2V2 Datasheet, PDF (77/80 Pages) Freescale Semiconductor, Inc – K60 Sub-Family

144 144 Pin Name Default
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
LQFP MAP
BGA
124 D5 PTC17
DISABLED
PTC17
CAN1_TX UART3_TX ENET0_1588_ FB_CS4_b/
TMR1
FB_TSIZ0/
FB_BE31_24_
b
125 C5 PTC18
DISABLED
PTC18
UART3_RTS_ ENET0_1588_ FB_TBST_b/
b
TMR2
FB_CS2_b/
FB_BE15_8_b
126 B5 PTC19
DISABLED
PTC19
UART3_CTS_ ENET0_1588_ FB_CS3_b/ FB_TA_b
b
TMR3
FB_BE7_0_b
127 A5 PTD0/
DISABLED
LLWU_P12
PTD0/
SPI0_PCS0 UART2_RTS_
LLWU_P12
b
FB_ALE/
FB_CS1_b/
FB_TS_b
128 D4 PTD1
ADC0_SE5b ADC0_SE5b PTD1
SPI0_SCK UART2_CTS_
b
FB_CS0_b
129 C4 PTD2/
DISABLED
LLWU_P13
PTD2/
SPI0_SOUT UART2_RX
LLWU_P13
FB_AD4
130 B4 PTD3
DISABLED
PTD3
SPI0_SIN UART2_TX
FB_AD3
131 A4 PTD4/
DISABLED
LLWU_P14
PTD4/
SPI0_PCS1 UART0_RTS_ FTM0_CH4 FB_AD2
LLWU_P14
b
EWM_IN
132 A3 PTD5
ADC0_SE6b ADC0_SE6b PTD5
SPI0_PCS2
UART0_CTS_
b/
UART0_COL_
b
FTM0_CH5
FB_AD1
EWM_OUT_b
133 A2 PTD6/
ADC0_SE7b ADC0_SE7b PTD6/
SPI0_PCS3 UART0_RX FTM0_CH6 FB_AD0
LLWU_P15
LLWU_P15
FTM0_FLT0
134 M10 VSS
VSS
VSS
135 F8 VDD
VDD
VDD
136 A1 PTD7
DISABLED
PTD7
CMT_IRO UART0_TX FTM0_CH7
FTM0_FLT1
137 C9 PTD8
DISABLED
PTD8
I2C0_SCL UART5_RX
FB_A16
138 B9 PTD9
DISABLED
PTD9
I2C0_SDA UART5_TX
FB_A17
139 B3 PTD10
DISABLED
PTD10
UART5_RTS_
b
FB_A18
140 B2 PTD11
DISABLED
PTD11
SPI2_PCS0 UART5_CTS_ SDHC0_
b
CLKIN
FB_A19
141 B1 PTD12
DISABLED
PTD12
SPI2_SCK
SDHC0_D4
FB_A20
142 C3 PTD13
DISABLED
PTD13
SPI2_SOUT
SDHC0_D5
FB_A21
143 C2 PTD14
DISABLED
PTD14
SPI2_SIN
SDHC0_D6
FB_A22
144 C1 PTD15
DISABLED
PTD15
SPI2_PCS1
SDHC0_D7
FB_A23
Pinout
EzPort
8.2 K60 Pinouts
The below figure shows the pinout diagram for the devices supported by this document.
Many signals may be multiplexed onto a single pin. To determine what signals can be
used on which pin, see the previous section.
K60 Sub-Family Data Sheet, Rev. 1, 6/2012.
Freescale Semiconductor, Inc.
Preliminary
77
General Business Information