K60P144M100SF2V2 Datasheet, PDF (22/80 Pages) Freescale Semiconductor, Inc – K60 Sub-Family

General
Table 10. General switching specifications (continued)
Symbol
Description
Port rise and fall time (low drive strength)
• Slew disabled
• 1.71 ≤ V_DD ≤ 2.7V
• 2.7 ≤ V_DD ≤ 3.6V
• Slew enabled
• 1.71 ≤ V_DD ≤ 2.7V
• 2.7 ≤ V_DD ≤ 3.6V
Min.
Max.
Unit
—
12
ns
—
6
ns
—
36
ns
—
24
ns
Notes
5
1. This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or
may not be recognized. In Stop, VLPS, LLS, and VLLSx modes, the synchronizer is bypassed so shorter pulses can be
recognized in that case.
2. The greater synchronous and asynchronous timing must be met.
3. This is the minimum pulse width that is guaranteed to be recognized as a pin interrupt request in Stop, VLPS, LLS, and
VLLSx modes.
4. 75pF load
5. 15pF load
5.4 Thermal specifications
5.4.1 Thermal operating requirements
Table 11. Thermal operating requirements
Symbol
T_J
T_A
Description
Die junction temperature
Ambient temperature
Min.
Max.
Unit
–40
125
°C
–40
105
°C
5.4.2 Thermal attributes
Board type Symbol
Single-layer
(1s)
R_θJA
Description 144 LQFP
Thermal
45
resistance,
junction to
ambient (natural
convection)
144
MAPBGA
48
Table continues on the next page...
Unit
°C/W
Notes
1
K60 Sub-Family Data Sheet, Rev. 1, 6/2012.
22
Preliminary
Freescale Semiconductor, Inc.
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