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K60P144M100SF2V2 Datasheet, PDF (42/80 Pages) Freescale Semiconductor, Inc – K60 Sub-Family
Peripheral operating requirements and behaviors
6.6.1 ADC electrical specifications
The 16-bit accuracy specifications listed in Table 27 and Table 28 are achievable on the
differential pins ADCx_DP0, ADCx_DM0, ADCx_DP1, ADCx_DM1, ADCx_DP3, and
ADCx_DM3.
The ADCx_DP2 and ADCx_DM2 ADC inputs are connected to the PGA outputs and are
not direct device pins. Accuracy specifications for these pins are defined in Table 29 and
Table 30.
All other ADC channels meet the 13-bit differential/12-bit single-ended accuracy
specifications.
6.6.1.1 16-bit ADC operating conditions
Table 27. 16-bit ADC operating conditions
Symbol
VDDA
ΔVDDA
ΔVSSA
VREFH
VREFL
VADIN
CADIN
Description
Conditions
Supply voltage Absolute
Supply voltage
Ground voltage
ADC reference
voltage high
Delta to VDD (VDD-VDDA)
Delta to VSS (VSS-VSSA)
Reference
voltage low
Input voltage
Input capacitance • 16 bit modes
• 8/10/12 bit modes
Min.
1.71
-100
-100
1.13
VSSA
VREFL
—
—
Typ.1
—
0
0
VDDA
VSSA
—
8
4
Max.
3.6
+100
+100
VDDA
VSSA
VREFH
10
5
RADIN
RAS
Input resistance
Analog source
resistance
13/12 bit modes
fADCK < 4MHz
—
2
5
—
—
5
fADCK
fADCK
Crate
ADC conversion ≤ 13 bit modes
clock frequency
1.0
—
ADC conversion 16 bit modes
clock frequency
2.0
—
ADC conversion ≤ 13 bit modes
rate
No ADC hardware averaging 20.000
—
Continuous conversions
enabled, subsequent
conversion time
Table continues on the next page...
18.0
12.0
818.330
Unit
V
mV
mV
V
V
V
pF
kΩ
kΩ
MHz
MHz
Ksps
Notes
2
2
3
4
4
5
K60 Sub-Family Data Sheet, Rev. 1, 6/2012.
42
Preliminary
Freescale Semiconductor, Inc.
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