MC9S12DT256_06 Datasheet, PDF (56/132 Pages) Freescale Semiconductor, Inc – Device User Guide V03.07

MC9S12DT256 Device User Guide — V03.07
Pin Name
Funct. 1
PP4
PP3
PP2
PP1
PP0
PS7
PS6
PS5
PS4
PS3
PS2
PS1
PS0
PT[7:0]
Pin Name
Funct. 2
KWP4
KWP3
KWP2
KWP1
KWP0
SS0
SCK0
MOSI0
MISO0
TXD1
RXD1
TXD0
RXD0
IOC[7:0]
Pin Name Pin Name Pin Name Power
Funct. 3 Funct. 4 Funct. 5 Supply
PWM4
PWM3
PWM2
PWM1
PWM0
—
—
—
—
—
—
—
—
—
MISO2
SS1
SCK1
MOSI1
MISO1
—
—
—
—
—
—
—
—
—
—
VDDX
—
VDDX
—
VDDX
—
VDDX
—
VDDX
—
VDDX
—
VDDX
—
VDDX
—
VDDX
—
VDDX
—
VDDX
—
VDDX
—
VDDX
—
VDDX
Internal Pull
Resistor
CTRL
Reset
State
PERP/
PPSP ^Disabled
PERP/
PPSP ^Disabled
PERP/
PPSP ^Disabled
PERP/
PPSP ^Disabled
PERP/
PPSP ^Disabled
PERS/
PPSS
Up
PERS/
PPSS
Up
PERS/
PPSS
Up
PERS/
PPSS
Up
PERS/
PPSS
Up
PERS/
PPSS
Up
PERS/
PPSS
Up
PERS/
PPSS
Up
PERT/
PPST ^Disabled
Description
Port P I/O, Interrupt, Channel 4 of
PWM, MISO2 of SPI2
Port P I/O, Interrupt, Channel 3 of
PWM, SS of SPI1
Port P I/O, Interrupt, Channel 2 of
PWM, SCK of SPI1
Port P I/O, Interrupt, Channel 1 of
PWM, MOSI of SPI1
Port P I/O, Interrupt, Channel 0 of
PWM, MISO2 of SPI1
Port S I/O, SS of SPI0
Port S I/O, SCK of SPI0
Port S I/O, MOSI of SPI0
Port S I/O, MISO of SPI0
Port S I/O, TXD of SCI1
Port S I/O, RXD of SCI1
Port S I/O, TXD of SCI0
Port S I/O, RXD of SCI0
Port T I/O, Timer channels
2.3 Detailed Signal Descriptions
2.3.1 EXTAL, XTAL — Oscillator Pins
EXTAL and XTAL are the crystal driver and external clock pins. On reset all the device clocks are derived
from the EXTAL input frequency. XTAL is the crystal output.
2.3.2 RESET — External Reset Pin
An active low bidirectional control signal, it acts as an input to initialize the MCU to a known start-up
state, and an output when an internal MCU function causes a reset.
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