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MC9S12DT256_06 Datasheet, PDF (55/132 Pages) Freescale Semiconductor, Inc – Device User Guide V03.07
MC9S12DT256 Device User Guide — V03.07
Pin Name Pin Name Pin Name Pin Name Pin Name Power
Funct. 1 Funct. 2 Funct. 3 Funct. 4 Funct. 5 Supply
Internal Pull
Resistor
CTRL
Reset
State
Description
PH4
KWH4
MISO2
—
PERH/
—
VDDR PPSH Disabled Port H I/O, Interrupt, MISO of SPI2
PH3
KWH3
SS1
—
PERH/
—
VDDR PPSH Disabled Port H I/O, Interrupt, SS of SPI1
PH2
KWH2
SCK1
—
PERH/
—
VDDR PPSH Disabled Port H I/O, Interrupt, SCK of SPI1
PH1
KWH1
MOSI1
—
PERH/
—
VDDR PPSH Disabled Port H I/O, Interrupt, MOSI of SPI1
PH0
KWH0
MISO1
—
PERH/
—
VDDR PPSH Disabled Port H I/O, Interrupt, MISO of SPI1
PERJ/
Port J I/O, Interrupt, TX of CAN4,
PJ7
KWJ7
TXCAN4
SCL
TXCAN0 VDDX PPSJ
Up
SCL of IIC, TX of CAN0
PJ6
KWJ6
RXCAN4
SDA
RXCAN0
VDDX
PERJ/
PPSJ
Port J I/O, Interrupt, RX of CAN4,
Up
SDA of IIC, RX of CAN0
PERJ/
PJ[1:0] KWJ[1:0]
—
—
—
VDDX PSJ
Up Port J I/O, Interrupts
PK7
ECS
ROMONE
—
Port K I/O, Emulation Chip Select,
—
VDDX PUCR
Up
ROM On Enable
PK[5:0]
XADDR
[19:14]
—
—
—
VDDX PUCR
Up Port K I/O, Extended Addresses
PERM/
PM7
TXCAN4
—
—
—
VDDX PPSM Disabled Port M I/O, TX of CAN4
PERM/
PM6
RXCAN4
—
—
—
VDDX PPSM Disabled Port M I/O RX of CAN4
PM5
TXCAN0 TXCAN4 SCK0
PERM/
Port M I/OCAN0, CAN4, SCK of
—
VDDX PPSM Disabled SPI0
PM4
RXCAN0 RXCAN4 MOSI0
PERM/
Port M I/O, CAN0, CAN4, MOSI of
—
VDDX PPSM Disabled SPI0
PM3
TXCAN1 TXCAN0
—
PERM/
Port M I/O, TX of CAN1, CAN0, SS
SS0
VDDX PPSM Disabled of SPI0
PM2
RXCAN1 RXCAN0
—
MISO0
PERM/
Port M I/O, RX of CAN1, CAN0,
VDDX PPSM Disabled MISO of SPI0
PM1
TXCAN0
TXB
—
PERM/
—
VDDX PPSM Disabled Port M I/O, TX of CAN0, TX of BDLC
PM0
RXCAN0
RXB
—
PERM/
—
VDDX PPSM Disabled Port M I/O, RX of CAN0, RX of BDLC
PP7
KWP7
PWM7
SCK2
PERP/
Port P I/O, Interrupt, Channel 7 of
—
VDDX PPSP Disabled PWM, SCK of SPI2
PP6
KWP6
PWM6
SS2
PERP/
Port P I/O, Interrupt, Channel 6 of
—
VDDX PPSP Disabled PWM, SS of SPI2
PERP/
Port P I/O, Interrupt, Channel 5 of
PP5
KWP5
PWM5
MOSI2
—
VDDX PPSP Disabled PWM, MOSI of SPI2
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