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S9S12G64F0CLF Datasheet, PDF (518/1292 Pages) Freescale Semiconductor, Inc – Reference Manual and Data Sheet
Analog-to-Digital Converter (ADC12B12CV2)
14.5 Resets
At reset the ADC12B12C is in a power down state. The reset state of each individual bit is listed within
the Register Description section (see Section 14.3.2, “Register Descriptions”) which details the registers
and their bit-field.
14.6 Interrupts
The interrupts requested by the ADC12B12C are listed in Table 14-24. Refer to MCU specification for
related vector address and priority.
Table 14-24. ATD Interrupt Vectors
Interrupt Source
Sequence Complete Interrupt
Compare Interrupt
CCR
Mask
I bit
I bit
Local Enable
ASCIE in ATDCTL2
ACMPIE in ATDCTL2
See Section 14.3.2, “Register Descriptions” for further details.
MC9S12G Family Reference Manual, Rev.1.23
520
Freescale Semiconductor