S9S12G64F0CLF Datasheet, PDF (470/1292 Pages) Freescale Semiconductor, Inc – Reference Manual and Data Sheet

Analog-to-Digital Converter (ADC10B12CV2)
13.1.3 Block Diagram
Bus Clock
Clock
Prescaler
ETRIG0
ETRIG1
ETRIG2
ETRIG3
(See device specifi-
cation for availability
and connectivity)
Trigger
Mux
ATDCTL1
ATDDIEN
ATD Clock
Mode and
Timing Control
Sequence Complete
Interrupt
Compare Interrupt
VDDA
VSSA
VRH
VRL
AN11
AN10
AN9
AN8
AN7
AN6
AN5
AN4
AN3
AN2
AN1
AN0
Successive
Approximation
Register (SAR)
and DAC
Results
ATD 0
ATD 1
ATD 2
ATD 3
ATD 4
ATD 5
ATD 6
ATD 7
ATD 8
ATD 9
ATD 10
ATD 11
Analog
MUX
Sample & Hold
+
-
Comparator
Figure 13-1. ADC10B12C Block Diagram
MC9S12G Family Reference Manual, Rev.1.23
472
Freescale Semiconductor