MC68HC908QB8 Datasheet, PDF (27/236 Pages) Freescale Semiconductor, Inc – To provide the most up-to-date information, the revision of our documents

Direct Page Registers
Addr.
$0022
$0023
$0024
$0025
$0026
$0027
$0028
$0029
$002A
$002B
↓
$002F
Register Name
TIM Counter Register Low
(TCNTL)
See page 185.
TIM Counter Modulo
Register High (TMODH)
See page 185.
TIM Counter Modulo
Register Low (TMODL)
See page 185.
TIM Channel 0 Status and
Control Register (TSC0)
See page 186.
TIM Channel 0
Register High (TCH0H)
See page 189.
TIM Channel 0
Register Low (TCH0L)
See page 189.
TIM Channel 1 Status and
Control Register (TSC1)
See page 186.
TIM Channel 1
Register High (TCH1H)
See page 189.
TIM Channel 1
Register Low (TCH1L)
See page 189.
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Reserved
Bit 7
Bit 7
0
Bit 15
1
Bit 7
1
CH0F
0
0
Bit 15
Bit 7
CH1F
0
0
Bit 15
Bit 7
6
Bit 6
0
Bit 14
1
Bit 6
1
CH0IE
0
Bit 14
Bit 6
CH1IE
0
Bit 14
Bit 6
5
4
3
2
Bit 5
Bit 4
Bit 3
Bit 2
0
Bit 13
1
Bit 5
1
MS0B
0
Bit 13
Bit 5
0
0
Bit 13
Bit 5
0
0
Bit 12
Bit 11
1
1
Bit 4
Bit 3
1
1
MS0A ELS0B
0
0
Bit 12
Bit 11
Indeterminate after reset
Bit 4
Bit 3
Indeterminate after reset
MS1A ELS1B
0
0
Bit 12
Bit 11
Indeterminate after reset
Bit 4
Bit 3
Indeterminate after reset
0
Bit 10
1
Bit 2
1
ELS0A
0
Bit 10
Bit 2
ELS1A
0
Bit 10
Bit 2
1
Bit 0
Bit 1
Bit 0
0
Bit 9
1
Bit 1
1
TOV0
0
Bit 9
0
Bit 8
1
Bit 0
1
CH0MAX
0
Bit 8
Bit 1
Bit 0
TOV1
0
Bit 9
CH1MAX
0
Bit 8
Bit 1
Bit 0
$0030
$0031
$0032
$0033
$0034
$0035
TIM Channel 2 Status and
Control Register (TSC2)
See page 186.
TIM Channel 2
Register High (TCH2H)
See page 189.
TIM Channel 2
Register Low (TCH2L)
See page 189.
TIM Channel 3 Status and
Control Register (TSC3)
See page 186.
TIM Channel 3
Register High (TCH3H)
See page 189.
TIM Channel 3
Register Low (TCH3L)
See page 189.
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
CH2F
0
0
Bit 15
Bit 7
CH3F
0
0
Bit 15
Bit 7
CH2IE
0
Bit 14
0
0
Bit 13
Bit 6
Bit 5
CH3IE
0
Bit 14
0
0
Bit 13
Bit 6
Bit 5
= Unimplemented
MS2A ELS2B
0
0
Bit 12
Bit 11
Indeterminate after reset
Bit 4
Bit 3
Indeterminate after reset
MS3A ELS3B
0
0
Bit 12
Bit 11
Indeterminate after reset
Bit 4
Bit 3
Indeterminate after reset
R = Reserved
ELS2A
0
Bit 10
TOV2
0
Bit 9
Bit 2
Bit 1
ELS3A
0
Bit 10
TOV3
0
Bit 9
Bit 2
Bit 1
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 3 of 5)
CH2MAX
0
Bit 8
Bit 0
CH3MAX
0
Bit 8
Bit 0
MC68HC908QB8 Data Sheet, Rev. 1
Freescale Semiconductor
27