MC68HC908QB8 Datasheet, PDF (211/236 Pages) Freescale Semiconductor, Inc – To provide the most up-to-date information, the revision of our documents

18.7 5-V Control Timing
5-V Control Timing
Characteristic⁽¹⁾
Symbol
Min
Max
Unit
Internal operating frequency
f_OP
(f_BUS)
—
8
MHz
Internal clock period (1/f_OP)
RST input pulse width low⁽²⁾
IRQ interrupt pulse width low (edge-triggered)⁽²⁾
IRQ interrupt pulse period⁽²⁾
t_cyc
125
—
ns
t_RL
100
—
ns
t_ILIH
100
—
ns
t_ILIL
Note⁽³⁾
—
t_cyc
1. V_DD = 4.5 to 5.5 Vdc, V_SS = 0 Vdc, T_A = T_L to T_H; timing shown with respect to 20% V_DD and 70% V_SS, unless otherwise
noted.
2. Values are based on characterization results, not tested in production.
3. The minimum period is the number of cycles it takes to execute the interrupt service routine plus 1 t_cyc.
t_RL
RST
t_ILIL
t_ILIH
IRQ
Figure 18-3. RST and IRQ Timing
MC68HC908QB8 Data Sheet, Rev. 1
Freescale Semiconductor
211