XPC8260ZUIFBC Datasheet, PDF (26/50 Pages) Freescale Semiconductor, Inc – PowerQUICC II Integrated Communications Processor Hardware Specifications

Clock Configuration Modes
Table 14. Clock Configuration Modes¹ (continued)
MODCK_H–MODCK[1–3]
Input Clock
Frequency^2,3
CPM Multiplication
Factor²
CPM Core Multiplication
Frequency²
Factor²
Core
Frequency²
1000_001
66 MHz
3.5
233 MHz
3
200 MHz
1000_010
66 MHz
3.5
233 MHz
3.5
233 MHz
1000_011
66 MHz
3.5
233 MHz
4
266 MHz
1000_100
66 MHz
3.5
233 MHz
4.5
300 MHz
1 _{Because of speed dependencies, not all of the possible configurations in Table 14 are applicable.}
2 _{The user should choose the input clock frequency and the multiplication factors such that the frequency of the CPU}
is equal to or greater than 150 MHz and the CPM ranges between 66–233 MHz.
3 _{Input clock frequency is given only for the purpose of reference. The user should set MODCK_H–MODCK_L so that}
the resulting configuration does not exceed the frequency rating of the user’s part.
3.2 PCI Mode
The MPC8265 and the MPC8266 have three clocking modes: local, PCI host, and PCI agent. The clocking
mode is set according to three input pins—PCI_MODE, PCI_CFG[0], PCI_MODCK—as shown in
Table 15.
Table 15. MPC8265 and MPC8266 Clocking Modes
Pins
PCI_MODE PCI_CFG[0] PCI_MODCK
1
—
—
0
0
0
0
0
1
0
1
0
0
1
1
Clocking Mode
Local bus
PCI host
PCI agent
PCI Clock
Frequency Range
(MHZ)
—
50–66
25–50
50–66
25–50
In addition, note the following:
NOTE: PCI_MODCK
In PCI mode only, PCI_MODCK comes from the LGPL5 pin and
MODCK_H[0–3] comes from {LGPL0, LGPL1, LGPL2, LGPL3}.
NOTE: Tval (Output Hold)
The minimum Tval = 2 when PCI_MODCK = 1, and the minimum Tval = 1
when PCI_MODCK = 0. Therefore, designers should use clock
configurations that fit this condition to achieve PCI-compliant AC timing.
NOTE
Clock configurations change only after POR is asserted.
MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0
26
Freescale Semiconductor