MC68HC05P4A Datasheet, PDF (24/72 Pages) Advanced Analogic Technologies – Microcontrollers

Interrupts
FROM
RESET
IS
Y
I BIT
SET
N
IRQ
EXTERNAL
Y
INTERRUPT
N
TIMER
INTERNAL
Y
INTERRUPT
N
FETCH
NEXT
INSTRUCTION
EXECUTE
INSTRUCTION
CLEAR IRQ
REQUEST
LATCH
STACK
PC, X, A, CC
SET I BIT
LOAD PC FROM:
IRQ: $1FFA–$1FFB
TIMER: $1FF8–$1FF9
COMPLETE
INTERRUPT
ROUTINE
AND EXECUTE
RTI
Figure 4-1. Hardware Interrupt Flowchart
A discussion is provided here.
1. RESET — A low input on the RESET input pin causes the
program to vector to its starting address, which is specified by
the contents of memory locations $1FFE and $1FFF. The I bit in the condition code register also
is set. Much of the MCU is configured to a known state during this type of reset as described in
Chapter 5 Resets.
2. STOP — The STOP instruction causes the oscillator to be turned off and the processor to "sleep"
until an external interrupt (IRQ) or reset occurs.
MC68HC05P4A Data Sheet, Rev. 7.1
24
Freescale Semiconductor