MC68HC05P4A Datasheet, PDF (18/72 Pages) Advanced Analogic Technologies – Microcontrollers

Memory Map
Addr.
$0000
$0001
$0002
$0003
$0004
$0005
$0006
$0007
$0008
$0009
$000A
$000B
$000C
$000D
$000E
$000F
Register Name
Port A Data Register
(PORTA)
Port B Data Register
(PORTB)
Port C Data Register
(PORTC)
Port D Data Register
(PORTD)
Port A Data Direction
(DDRA)
Port B Data Direction
(DDRB)
Port C Data Direction
(DDRC)
Port D Data Direction
(DDRD)
Unimplemented
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Bit 7
PA7
PB7
PC7
PD7
DDRA7
0
DDRB7
0
DDRC7
0
0
0
6
PA6
PB6
PC6
0
DDRA6
0
DDRB6
0
DDRC6
0
0
0
5
PA5
PB5
PC5
PD5
DDRA5
0
DDRB5
0
DDRC5
0
DDRD5
0
4
3
PA4
PA3
Unaffected by reset
0
0
Unaffected by reset
PC4
PC3
Unaffected by reset
1
0
Unaffected by reset
DDRA4 DDRA3
0
0
1
1
0
DDRC4
0
0
0
DDRC3
0
0
0
0
2
1
Bit 0
PA2
PA1
PA0
0
0
0
PC2
PC1
PC0
0
0
0
DDRA2
0
1
DDRA1
0
1
DDRA0
0
1
0
DDRC2
0
0
0
DDRC1
0
0
0
DDRC0
0
0
0
0
0
Unimplemented
Read: 0
SIOP Control Register
(SCR)
Write:
Reset: 0
Read:
SIOP Status Register
(SSR)
Write:
SPIF
Reset: 0
Read:
SIOP Data Register
(SDR)
Write:
BIT 7
Reset:
Unimplemented
SPE
0
DCOL
0
BIT 6
0
0
0
0
BIT 5
0
MSTR
0
0
0
0
0
0
BIT 4
BIT 3
Unaffected by reset
0
0
0
0
0
0
0
0
0
0
0
0
BIT 2 BIT 1 BIT 0
Unimplemented
Unimplemented
= Unimplemented U = Unaffected X = Indeterminate
Figure 2-2. I/O Registers for the MC68HC05P4A (Sheet 1 of 2)
MC68HC05P4A Data Sheet, Rev. 7.1
18
Freescale Semiconductor