33888 Datasheet, PDF (23/40 Pages) Freescale Semiconductor, Inc – Quad High-Side and Octal Low-Side Switch for Automotive

FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
CSB
SCLK
SI
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
SO
OD15 OD14 OD13 OD12 OD11 OD10 OD9 OD8 OD7 OD6 OD5 OD4 OD3 OD2 OD1 OD0
Notes 1. RST is in a logic [1] state during the above operation.
2. D15:D0 relate to the most recent ordered entry of program data into the 33888.
3. OD15:OD0 relate to the first 16 bits of ordered fault and status data out of the 33888.
Figure 8. Single 16-Bit Word SPI Communication
CSB
SCLK
SI
D15 D14 D13
D2 D1 D0 D15* D14* D13*
D2* D1* D0*
SO
OD15 OD14 OD13
OD2 OD1 OD0 D15 D14 D13
D2 D1 D0
Notes 1. RST is a logic [1] state during the above operation.
2. D15:D0 relate to the most recent ordered entry of program data into the 33888.
3. D15*:D0* relate to the first 16 bits of ordered entry data out of the 33888.
4. OD15:OD0 relate to the first 16 bits of ordered fault and status data out of the 33888.
Figure 9. Multiple 16-Bit Word SPI Communication
SERIAL INPUT COMMUNICATION
SPI communication is accomplished using 16-bit
messages. A message is transmitted by the MCU starting
with the MSB, D15, and ending with the LSB, D0 (refer to
Table 8, page 23). Each incoming command message on the
SI pin can be interpreted using the following bit assignments:
the first twelve LSBs, D11: D0, control each of the twelve
outputs; the next three bits, D14 : D12, determine the
command mode; and the MSB, D15, is the watchdog bit.
Multiple messages can be transmitted in succession to
accommodate those applications where daisy chaining is
desirable or to confirm transmitted data, as long as the
messages are all multiples of 16 bits. Any attempt made to
latch in a message that is not 16 bits will be ignored.
The 33888 has six registers that are used to configure the
device and control the state of the four high-side and eight
low-side outputs (Table 9, page 24). The registers are
addressed via D14:D12 of the incoming SPI word (Table 8,
page 23).
Table 8. SI Message Bit Assignment
Bit Sig SI Msg Bit
Message Bit Description
MSB
D15
Watchdog in: toggled to satisfy watchdog
requirements.
D14 : 12
D11
D10
Register address bits.
Used to configure Low-Side Output LS11.
Used to configure Low-Side Output LS10.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33888
23