MSC7116_08 Datasheet, PDF (19/60 Pages) Freescale Semiconductor, Inc – Low-Cost 16-bit DSP with DDR Controller and 10/100 Mbps Ethernet MAC

Electrical Characteristics
2.3 Thermal Characteristics
Table 4 describes thermal characteristics of the MSC7116 for the MAP-BGA package.
Table 4. Thermal Characteristics for MAP-BGA Package
Characteristic
MAP-BGA 17 × 17 mm⁵
Symbol
Natural
200 ft/min
Unit
Convection (1 m/s) airflow
Junction-to-ambient^{1, 2}
Junction-to-ambient, four-layer board^{1, 3}
Junction-to-board⁴
Junction-to-case⁵
Junction-to-package-top⁶
R_θJA
39
R_θJA
23
R_θJB
12
R_θJC
7
Ψ_JT
2
31
°C/W
20
°C/W
°C/W
°C/W
°C/W
Notes: 1. Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board)
temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal
resistance.
2. Per SEMI G38-87 and JEDEC JESD51-2 with the single layer board horizontal.
3. Per JEDEC JESD51-6 with the board horizontal.
4. Thermal resistance between the die and the printed circuit board per JEDEC JESD 51-8. Board temperature is measured on
the top surface of the board near the package.
5. Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883 Method
1012.1).
6. Thermal characterization parameter indicating the temperature difference between package top and the junction temperature
per JEDEC JESD51-2.
Section 3.1, Thermal Design Considerations explains these characteristics in detail.
2.4 DC Electrical Characteristics
This section describes the DC electrical characteristics for the MSC7116.
Note:
The leakage current is measured for nominal voltage values must vary in the same direction (for example, both V_DDIO
and V_DDC vary by +2 percent or both vary by –2 percent).
Table 5. DC Electrical Characteristics
Characteristic
Symbol
Min
Typical
Max
Unit
Core and PLL voltage
DRAM interface I/O voltage¹
I/O voltage
DRAM interface I/O reference voltage²
DRAM interface I/O termination voltage³
Input high CLKIN voltage
DRAM interface input high I/O voltage
DRAM interface input low I/O voltage
Input leakage current, V_IN = V_DDIO
V_REF input leakage current
V_DDC
V_DDPLL
V_DDM
V_DDIO
V_REF
VTT
V_IHCLK
V_IHM
V_ILM
I_IN
I_VREF
1.14
2.375
3.135
0.49 × V_DDM
V_REF – 0.04
2.4
V_REF + 0.28
–0.3
–1.0
—
1.2
2.5
3.3
1.25
V_REF
3.0
V_DDM
GND
0.09
—
1.26
V
2.625
V
3.465
V
0.51 × V_DDM
V
V_REF + 0.04
V
3.465
V
V_DDM + 0.3
V
V_REF – 0.18
V
1
µA
5
µA
MSC7116 Data Sheet, Rev. 13
Freescale Semiconductor
19