F81218 Datasheet, PDF (8/64 Pages) Feature Integration Technology Inc. – ISA/LPC to 6 UART Datasheet

F81218
4. Pin Description
I/O_8t5V-d100 - TTL level bi-directional pin with 8 mA source-sink capability, 5V tolerance, pull-down
100K ohms
I/O_12t
- TTL level bi-directional pin with 12 mA source-sink capability
I/OD₁₂
- TTL level bi-directional pin, Open-drain outpu with 12 mA sink capability
PCI_5V
OUT₁₂
- bi-direction pin, slew rate control, 5V tolerance.
- Output pin with 12 mA source-sink capability
OD₁₂
- Open-drain output pin with 12 mA sink capability
IN_t
- TTL level input pin
IN_t5V
- TTL level input pin and 5V tolerance.
IN_ts
IN_ts5V
- TTL level input pin and schmitt trigger
- TTL level input pin and Schmitt trigger, 5V tolerance.
P
- Power
4.1 ISA/LPC Interface
Pin No. Pin Name
99
ISA_IRQA
IRQIN0
100
ISA_IRQB
IRQIN1
1
PCIRST#
2
PME#
3
WDT_OUT#
Type
O₁₂
IN_t5V
O₁₂
IN_t5V
IN_ts
OD₁₂
OD₁₂
Description
Default is ISA IRQ output
When in LPC mode (pin 39 PS_LPC =1), the pin becomes LPC
to ISA IRQ input. About IRQ index setting please refer to pin84
and pin86.
Default is ISA IRQ output,
When in LPC mode (pin 39 PS_LPC =1), the pin becomes LPC
to ISA IRQ input. About IRQ index setting please refer to pin74
and pin76.
System PCI reset active low.
Generated PME event.
Watch dog timer output. When pin 50 power on setting
PS_WDT=0(default), Watch Dog timer time interval setting is
programmed by register. Once power on setting PS_WDT=1,
watch dog timer time interval will be fixed to 10 sec.
-3-
August, 2007
V0.33P