F81218 Datasheet, PDF (44/64 Pages) Feature Integration Technology Inc. – ISA/LPC to 6 UART Datasheet

F81218
6.8.5 IRQIN0 Channel Select Register (Only for LPC) – index 70h
Power-on default [7:0] = 0x00h.
Bit
Name
R/W
Description
7:6 Reserved
R/W Return 0 when read.
5
IRQIN0_MODE R/W 0 : PCI IRQ sharing mode.
1 : ISA IRQ sharing mode.
This bit is effective in IRQ sharing mode.
4
IRQIN0_SHAR R/W 0 : IRQ is not sharing with other device.
1 : IRQ is sharing with other device.
3:0 SELRQIN0[3:0] R/W In LPC mode , select the Serial IRQ channel.
03h : use serial IRQ channel 3 in LPC mode.
04h : use serial IRQ channel 4 in LPC mode.
05h : use serial IRQ channel 5 in LPC mode.
09h : use serial IRQ channel 9 in LPC mode.
0Ah : use serial IRQ channel 10 in LPC mode.
0Bh : use serial IRQ channel 11 in LPC mode.
Otherwise will disable the interrupt.
6.9 Address Decoder 1 Device Control Register (LDN 7)
6.9.1 Device Enable Register – index 30h
Power-on default [7:0] = 0x00h.
Bit
Name
R/W
Description
7:1 Reserved
R/W Return 0 when read.
0
ADDEC1_EN R/W 0 : Disable Address Decoder 1.
1 : Enable Address Decoder 1.
6.9.2 Address Decoder Select Register 0 – index 60h
Power-on default [7:0] = 0x00h.
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August, 2007
V0.33P