F81218 Datasheet, PDF (21/64 Pages) Feature Integration Technology Inc. – ISA/LPC to 6 UART Datasheet

F81218
5.2.1.11 MODEM Status Register – Base + 6
Power-on default [7:0] = 0xX0h.
Bit
Name
R/W
Description
7
DCD
R
Complement of DCD# input. In loop back mode, this bit is equivalent
to OUT2 in MCR.
6
RI
R
Complement of RI# input. In loop back mode , this bit is equivalent to
OUT1 in MCR
5
DSR
R
Complement of DSR# input. In loop back mode , this bit is
equivalent to DTR in MCR
4
CTS
R
Complement of CTS# input. In loop back mode , this bit is equivalent
to RTS in MCR
3
DDCD
R
0 : No state changed at DCD#.
1 : State changed at DCD#.
2
TERI
R
0 : No Trailing edge at RI#.
1 : A low to high transition at RI#.
1
DDSR
R
0 : No state changed at DSR#.
1 : State changed at DSR#.
0
DCTS
R
0 : No state changed at CTS#.
1 : State changed at CTS#.
5.2.1.11 Scratch Register – Base + 7
Power-on default [7:0] = 0x00h.
Bit
Name
R/W
7:0 SCR_DATA[7:0] R/W Scratch register.
Description
5.3 IR Function
The F81218 infrared interface provides a two way wireless communications port using
infrared as the transmission medium. The IrDA 1.0 (SIR) is found in UART1 and UART2. IrDA SIR
specifies asynchronous serial communication at baud rate up to 115.2Kbps. Each byte is sent serial
LSB first beginning with a zero value start bit. A zero is signaled by sending a single infrared pulse at
the beginning of the serial bit time. A one is signaled by the absence of an infrared pulse during the
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August, 2007
V0.33P