F81218 Datasheet, PDF (48/64 Pages) Feature Integration Technology Inc. – ISA/LPC to 6 UART Datasheet

F81218
6.10.6 Timer Count Number Register – index F1h
Power-on default [7:0] = 0x0Ah when DTR3#/PS_WDT is pull-up, else 0x00h.
Bit
Name
R/W
Description
7:0 WDT_CNT[7:0]
R/W The number of count for watchdog timer.
Write the same value twice to enable the timer, otherwise will disable
timer.
6.11 GPIO and PME Device Control Register (LDN 9)
6.11.1 GPIO Port 2 Control Register – index F0h
Power-on default [7:0] = 0x00h.
Bit
Name
R/W
Description
7
GP27_OE
R/W 0 : GP27 is in input mode.
1 : GP27 is in output mode.
6
GP26_OE
R/W 0 : GP26 is in input mode.
1 : GP26 is in output mode.
5
GP25_OE
R/W 0 : GP25 is in input mode.
1 : GP25 is in output mode.
4
GP24_OE
R/W 0 : GP24 is in input mode.
1 : GP24 is in output mode.
3
GP23_OE
R/W 0 : GP23 is in input mode.
1 : GP23 is in output mode.
2
GP22_OE
R/W 0 : GP22 is in input mode.
1 : GP22 is in output mode.
1
GP21_OE
R/W 0 : GP21 is in input mode.
1 : GP21 is in output mode.
0
GP20_OE
R/W 0 : GP20 is in input mode.
1 : GP20 is in output mode.
6.11.2 GPIO Port 1 Control Register – index F1h
Power-on default [7:0] = 0x00h.
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August, 2007
V0.33P