F81218 Datasheet, PDF (24/64 Pages) Feature Integration Technology Inc. – ISA/LPC to 6 UART Datasheet

IRQ/Data Frame
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
32:22
Signal Sampled
IRQ0
IRQ1
SMI#
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
IRQ8
IRQ9
IRQ10
IRQ11
IRQ12
IRQ13
IRQ14
IRQ15
IOCHCK#
INTA#
INTB#
INTC#
INTD#
Unassigned
F81218
# of clocks past Start
2
5
8
11
14
17
20
23
26
29
32
35
38
41
44
47
50
53
56
59
62
95
5.5.3 Stop Frame
After all IRQ/Data Frames have completed, the host controller will terminate SERIRQ by
a Stop frame. Only the host controller can initiate the Stop frame by driving SERIRQ low for 2 or 3
clocks. If the Stop Frame is low for 2 clocks, the next SERIRQ cycle's Sample mode is the Quiet
mode. If the Stop Frame is low for 3 clocks, the next SERIRQ cycle's Sample mode is the
Continuous mode.
-19-
August, 2007
V0.33P