XRT83L38 Datasheet, PDF (8/91 Pages) Exar Corporation – OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

XRT83L38
OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. 1.0.0
TABLE 32: MICROPROCESSOR REGISTER #13, BIT DESCRIPTION .............................................................................. 64
TABLE 33: MICROPROCESSOR REGISTER #14, BIT DESCRIPTION .............................................................................. 65
TABLE 34: MICROPROCESSOR REGISTER #15, BIT DESCRIPTION .............................................................................. 65
TABLE 35: MICROPROCESSOR REGISTER #128, BIT DESCRIPTION ............................................................................ 66
CLOCK SELECT REGISTER........................................................................................... 67
FIGURE 25. REGISTER 0X81H SUB REGISTERS......................................................................................................... 67
TABLE 36: MICROPROCESSOR REGISTER #129, BIT DESCRIPTION ............................................................................ 67
TABLE 37: MICROPROCESSOR REGISTER #130, BIT DESCRIPTION ............................................................................ 69
TABLE 38: MICROPROCESSOR REGISTER #131, BIT DESCRIPTION ............................................................................ 71
TABLE 39: MICROPROCESSOR REGISTER #192, BIT DESCRIPTION ............................................................................ 72
ELECTRICAL CHARACTERISTICS................................................................................ 73
TABLE 40: ABSOLUTE MAXIMUM RATINGS ................................................................................................................ 73
TABLE 41: DC DIGITAL INPUT AND OUTPUT ELECTRICAL CHARACTERISTICS .............................................................. 73
TABLE 42: XRT83L38 POWER CONSUMPTION ........................................................................................................ 73
TABLE 43: E1 RECEIVER ELECTRICAL CHARACTERISTICS ......................................................................................... 74
TABLE 44: T1 RECEIVER ELECTRICAL CHARACTERISTICS.......................................................................................... 75
TABLE 45: E1 TRANSMIT RETURN LOSS REQUIREMENT ............................................................................................ 75
TABLE 46: E1 TRANSMITTER ELECTRICAL CHARACTERISTICS.................................................................................... 76
TABLE 47: T1 TRANSMITTER ELECTRICAL CHARACTERISTICS .................................................................................... 76
FIGURE 26. ITU G.703 PULSE TEMPLATE ................................................................................................................ 77
TABLE 48: TRANSMIT PULSE MASK SPECIFICATION................................................................................................... 77
FIGURE 27. DSX-1 PULSE TEMPLATE (NORMALIZED AMPLITUDE) .............................................................................. 78
TABLE 49: DSX1 INTERFACE ISOLATED PULSE MASK AND CORNER POINTS................................................................ 78
TABLE 50: AC ELECTRICAL CHARACTERISTICS ......................................................................................................... 79
FIGURE 28. TRANSMIT CLOCK AND INPUT DATA TIMING ............................................................................................ 79
MICROPROCESSOR INTERFACE I/O TIMING .................................................................................... 80
Intel Interface Timing - Asynchronous..................................................................................................... 80
FIGURE 29. RECEIVE CLOCK AND OUTPUT DATA TIMING........................................................................................... 80
FIGURE 30. INTEL ASYNCHRONOUS PROGRAMMED I/O INTERFACE TIMING ................................................................ 80
TABLE 51: ASYNCHRONOUS MODE 1 - INTEL 8051 AND 80188 INTERFACE TIMING .................................................... 81
Motorola Asychronous Interface Timing.................................................................................................. 82
FIGURE 31. MOTOROLA 68K ASYNCHRONOUS PROGRAMMED I/O INTERFACE TIMING ................................................ 82
TABLE 52: ASYNCHRONOUS - MOTOROLA 68K - INTERFACE TIMING SPECIFICATION................................................... 82
FIGURE 32. MICROPROCESSOR INTERFACE TIMING - RESET PULSE WIDTH ............................................................... 82
PACKAGE DIMENSIONS ................................................................................................................. 83
208 LEAD TQFP ............................................................................................................................... 83
(28 X 28 X 1.4MM)............................................................................................................................. 83
225 BALL PLASTIC BALL GRID ARRAY (BOTTOM VIEW) ....................................................................... 84
(19.0 X 19.0 X 1.0MM)...................................................................................................................... 84
ORDERING INFORMATION...................................................................................................... 85
REVISIONS................................................................................................................................ 85
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