XRT83L38 Datasheet, PDF (76/91 Pages) Exar Corporation – OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

XRT83L38
OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. 1.0.0
TABLE 39: MICROPROCESSOR REGISTER #192, BIT DESCRIPTION
REGISTER ADDRESS
11000000
BIT #
D[7:1]
NAME
Reserved
FUNCTION
These register bits are not used.
REGISTER
TYPE
RESET
VALUE
R/W
0
D0
E1Arben E1 Arbitrary Pulse Enable
R/W
0
This bit is used to enable the Arbitrary Pulse Generators for
shaping the transmit pulse shape when E1 mode is selected.
If this bit is set to "1", all 8 channels will be configured for the
Arbitrary Mode. However, each channel is individually con-
trolled by programming the channel registers 0xn8 through
0xnF, where n is the number of the channel.
"0" = Disabled (Normal E1 Pulse Shape ITU G.703)
"1" = Arbitrary Pulse Enabled
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