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XRT83L38 Datasheet, PDF (23/91 Pages) Exar Corporation – OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR | |||
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XRT83L38
OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. 1.0.0
SIGNAL NAME
TQFP
PIN #
BGA
LEAD #
TYPE
DESCRIPTION
TXTSEL
84
V11
I Transmit Termination Select - Hardware Mode
When this pin is âLowâ the transmit line termination is determined only by an
external resistor. When âHighâ, the transmit termination is realized only by the
internal resistor.
TERSEL1
TERSEL0
85
T11
86
R11
TXTSEL TX Termination
0
External
1
Internal
NOTES:
1. This pin is internally pulled âLowâ with a 50k⦠resistor.
2. In Hardware mode all channels share the same TXTSEL control
function.
I Termination Impedance Select bit 1:
Termination Impedance Select bit 0:
In the Hardware mode and in the internal termination mode (TXTSEL=â1â
and RXTSEL=â1â) TERSEL[1:0] control the transmit and receive termination
impedance according to the following table.
TERSEL1 TERSEL0 Termination
0
0
100â¦
0
1
110â¦
1
0
75â¦
1
1
120â¦
TEST
ICT
87
U12
88
V12
In the internal termination mode the receiver termination of each receiver is
realized completely by internal resistors or by the combination of internal and
one fixed external resistor (see description of RXRES[1:0] pins).
In the internal termination mode the transformer ratio of 1:2 or 1:2.45 and
1:1 is required for transmitter and receiver respectively with the transmitter
output AC coupled to the transformer.
NOTES:
1. This pin is internally pulled âLowâ with a 50k⦠resistor.
2. In Hardware mode, all channels share the same TERSEL control
function.
3. In the external termination mode a 1:2 or 1:2.45 transformer ratio
must be used for the transmitter.
I Manufacturing Test:
NOTE: For normal operation this pin must be tied to ground.
I In-Circuit Testing (Active âLowâ):
When this pin is tied âLowâ, all output pins are forced to a high impedance
state for in-circuit testing.
Pulling RESET and ICT pins âLowâ simultaneously will put the chip in factory
test mode. This condition should not be permitted during normal operation.
NOTE: This pin is internally pulled âHighâ with a 50k⦠resistor.
19
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