XR16L788 Datasheet, PDF (7/42 Pages) Exar Corporation – HIGH PERFORMANCE OCTAL UART

XR16L788 OCTAL UART
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REV. 1.1.4
DESCRIPTION
The XR16L788 (788) integrates the functions of 8 en-
hanced 16550 UARTs, a general purpose 16-bit tim-
er/counter and an on-chip oscillator. The device con-
figuration registers include a set of four consecutive
interrupt source registers that provides interrupt-sta-
tus for all 8 UARTs, timer/counter and a sleep wake
up indicator. Each UART channel has its own 16550
UART compatible configuration register set for indi-
vidual channel control, status, and data transfer. Ad-
ditionally, each UART channel has 64-byte of transmit
and receive FIFOs, automatic RTS/CTS or DTR/DSR
hardware flow control with hysteresis control, auto-
matic Xon/Xoff and special character software flow
control, programmable transmit and receive FIFO
trigger levels, FIFO level counters, infrared encoder
and decoder (IrDA ver. 1.0), programmable baud rate
generator with a prescaler of divide by 1 or 4, and da-
ta rate up to 6.25 Mbps with 8X sampling clock rate
or 3.125Mbps in the 16X rate. The XR16L788 is a 5V
and 3.3V device with 5 volt tolerant inputs.
1.0 XR16L788 REGISTERS
The XR16L788 octal UART register set consists of
the Device Configuration Registers that are accessi-
ble directly from the data bus for programming gener-
al operating conditions of the UARTs and monitoring
the status of various functions. These functions in-
clude all 8 channel UART’s interrupt control and sta-
tus, 16-bit general purpose timer control and status,
sleep mode, soft-reset, and device identification and
revision. Also, each UART channel has its own set of
internal UART Configuration Registers for its own op-
eration control, status reporting and data transfer.
These registers are mapped into a 256-byte of the
data memory address space. The following para-
graphs describe all the registers in detail.
FIGURE 3. THE XR16L788 REGISTERS
8-bit Data
Bus
In te rfa c e
Channel 0
Channel 1
Channel 2
Channel 3
Channel 4
Channel 5
Channel 6
Channel 7
INT0, INT1, INT2,
INT3, TIMER,
SLEEP, RESET
0x00-0F
0x10-1F
0x20-2F
0x30-3F
0x40-4F
0x50-5F
0x60-6F
0x70-7F
0x80-8F
UART[7:0] Configuration
R e g is te rs
16550 Com patible and EXAR
Enhanced Registers
Device Configuration Registers
8 channel Interrupts,
16-bit Tim er/Counter,
Sleep, Reset, DVID, DREV
7 5 8R E G S -1
1.1 DEVICE CONFIGURATION REGISTER SET
The device configuration registers are directly acces-
sible from the bus. This provides easy programming
of general operating parameters to the 788 UART
and for monitoring the status of various functions.
The device configuration registers are mapped onto
address 0x80-8F as shown on the register map in
Table 2 and Figure 3. These registers provide global
controls and status of all 8 channel UARTs that in-
clude interrupt status, 16-bit general purpose timer
control and status, 8X or 16X sampling clock, sleep
mode control, soft-reset control, simultaneous UART ini-
tialization, and device identification and revision.
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