XR16L788 Datasheet, PDF (10/42 Pages) Exar Corporation – HIGH PERFORMANCE OCTAL UART

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XR16L788 OCTAL UART
REV. 1.1.4
TABLE 3: UART CHANNEL [7:0] INTERRUPT SOURCE ENCODING AND CLEARING
PRIORITY BIT2BIT1 BIT0
INTERRUPT SOURCE(S) AND CLEARING
x 0 0 0 None
1 0 0 1 RXRDY & RX Line Status (logic OR of LSR[4:1]). RXRDY INT clears by reading data in the RX
FIFO until it falls below the trigger level; RX Line Status INT cleared after reading LSR register.
2 0 1 0 RXRDY Time-out: Cleared same way as RXRDY INT.
3 0 1 1 TXRDY, THR or TSR (auto RS485 mode) empty, clears after reading ISR register.
4 1 0 0 MSR, RTS/CTS or DTR/DSR delta or Xoff/Xon or special character detected. The first two clears
after reading MSR register; Xoff/Xon or special char. detect INT clears after reading ISR register.
5 1 0 1 Reserved.
6 1 1 0 Reserved.
7 1 1 1 TIMER Time-out, shows up as a channel 0 INT. It clears after reading the TIMERCNTL register.
Reserved in other channels.
1.1.2 General Purpose 16-bit Timer/Counter.
[TIMERMSB, TIMELSB, TIMER, TIMECNTL]
(DEFAULT 0XXX-XX-00-00)
A 16-bit down-count timer for general purpose timer
or counter. Its clock source may be selected from in-
ternal crystal oscillator or externally on pin TMRCK.
The timer can be set to be a single-shot for a one-
time event or re-triggerable for a periodic event. An
FIGURE 5. TIMER/COUNTER CIRCUIT.
interrupt may be generated in the INT Register when
the timer times out. It is controlled through 4 configu-
ration registers [TIMERCNTL, TIMER, TIMELSB,
TIMERMSB]. These registers provide start/stop and
re-triggerable or one-shot operation. The time-out
output of the Timer can be set to generate an inter-
rupt for system or event alarm.
TIM ERM SB and TIM ERLSB
(16-bit Value)
TMRCK
1
OSC. CLOCK
0
1 6 -B it
Tim e-out
1
Tim er/Counter
0
C lock
T IM E R C N TL [3] ^Select
S ta rt/S to p
TIM ERCNTL [1]
T IM E R C N T L [2] ^{Single/Re-triggerable}
R e -trig g e r
0
1
S in g le -s h o t
T IM E R C N TL [0] ^{Tim er Interrupt Enable}
Tim er Interrupt, C h-0 IN T=7
No Interrupt
TABLE 4: TIMER CONTROL REGISTER
TIMERCNTL [0] Logic zero (default) disables Timer-Counter interrupt and logic one enables the interrupt, reading the
TIMERCNTL clears the interrupt.
TIMERCNLT [1] Logic zero (default) stops/pauses the timer and logic one starts/re-starts the timer/counter.
TIMERCNTL [2] Logic zero (default) selects re-trigger timer function and logic one selects one-shot (timer function.
TIMERCNTL [3] Logic zero (default) selects internal and logic one selects external clock to the timer/counter.
TIMERCNTL [7:4] Reserved (defaults to zero).
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