XR16L788 Datasheet, PDF (14/42 Pages) Exar Corporation – HIGH PERFORMANCE OCTAL UART

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XR16L788 OCTAL UART
REV. 1.1.4
FIGURE 7. BAUD RATE GENERATOR
To Other
C h a n n e ls
XTAL1
XTAL2
Crystal
Osc/
Buffer
P re s c a le r
Divide by 1
P re s c a le r
Divide by 4
DLL and DLM
R e g is te rs
M CR Bit-7=0
(default)
Baud Rate
G e n era tor
Logic
M CR Bit-7=1
16X or 8X
Sam pling
Rate C lock to
Transm itter
and Receiver
Programming the Baud Rate Generator Registers
DLM and DLL provides the capability of selecting the
operating data rate. Table 6 shows the standard data
rates available with a 14.7456 MHz crystal or external
clock at 16X clock rate. At 8X sampling rate, these
data rates would double. When using a non-standard
data rate crystal or external clock, the divisor value
can be calculated for channel ‘N’ with the following
equation(s).
divisor (decimal) = (XTAL1 clock frequency / prescaler) / (serial data rate x 16), WHEN 8XMODE-BIT N IS 0
divisor (decimal) = (XTAL1 clock frequency / prescaler) / (serial data rate x 8), WHEN 8XMODE-BIT N IS 1
TABLE 6: TYPICAL DATA RATES WITH A 14.7456 MHZ CRYSTAL OR EXTERNAL CLOCK AT 16X SAMPLING
OUTPUT Data Rate OUTPUT Data Rate DIVISOR FOR 16x DIVISOR FOR 16x DLM PROGRAM DLL PROGRAM DATA RATE
MCR Bit-7=1
MCR Bit-7=0 Clock (Decimal) Clock (HEX) VALUE (HEX) VALUE (HEX) ERROR (%)
100
400
2304
900
09
00
0
600
2400
384
180
01
80
0
1200
4800
192
C0
00
C0
0
2400
9600
96
60
00
60
0
4800
19.2k
48
30
00
30
0
9600
38.4k
24
18
00
18
0
19.2k
76.8k
12
0C
00
0C
0
38.4k
153.6k
6
06
00
06
0
57.6k
230.4k
4
04
00
04
0
115.2k
460.8k
2
02
00
02
0
230.4k
921.6k
1
01
00
01
0
4.2 AUTOMATIC RTS/DTR HARDWARE FLOW CON-
TROL OPERATION
Automatic RTS/DTR flow control is used to prevent
data overrun to the local receiver FIFO. The RTS#/
DTR# output pin is used to request remote unit to
suspend/resume data transmission. The flow control
features are individually selected to fit specific appli-
cation requirement (see Figure 8):
- Select RTS (and CTS) or DTR (and DSR) through
MCR bit-2.
- Enable auto RTS/DTR flow control using EFR bit-6.
- The auto RTS/DTR function must be started by as-
serting RTS/DTR# output pin (MCR bit-0 or 1 to
logic 1 after it is enabled.
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