XR16L788 Datasheet, PDF (3/42 Pages) Exar Corporation – HIGH PERFORMANCE OCTAL UART

XR16L788 OCTAL UART
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REV. 1.1.4
PIN DESCRIPTIONS
NAME
PIN #
TYPE
DESCRIPTION
DATA BUS INTERFACE
A7-A0
20-27
I Address data lines [7:0]. A0:A3 selects individual UART’s 16 configuration reg-
isters, A4:A6 selects UART channel 0 to7, and A7 selects the global device
configuration registers.
D7:D0
5-12
IO Data bus lines (7:0] (bidirectional).
IOR#
19
I When 16/68# pin is at logic 1, it selects Intel bus interface and this input is
read strobe (active low). The falling edge instigates an internal read cycle and
retrieves the data byte from an internal register pointed by the address lines
[A7:A0], places it on the data bus to allow the host processor to read it on the
leading edge.
When 16/68# pin is at logic 0, it selects Motorola bus interface and this input
should be connected to VCC.
IOW#
13
I When 16/68# pin is at logic 1, it selects Intel bus interface and this input
becomes write strobe (active low). The falling edge instigates the internal
write cycle and the leading edge transfers the data byte on the data bus to an
internal register pointed by the address lines.
When 16/68# pin is at logic 0, it selects Motorola bus interface and this input
becomes read (logic 1) and write (logic 0) signal (R/W#).
CS#
INT#
30
I
16
OD
MODEM OR SERIAL I/O INTERFACE
When 16/68# pin is at logic 1, this input is chip select (active low) to enable
the XR16L788 device.
When 16/68# pin is at logic 0, this input becomes the read and write strobe
(active low) for the Motorola bus interface.
Global interrupt output from XR16L788 (open drain, active low). This output
requires an external pull-up resistor (47K-100K ohms) to operate properly. It
may be shared with other devices in the system to form a single interrupt line
to the host processor and have the software driver polls each device for the
interrupt status.
TX0
93
O UART channel 0 Transmit Data or infrared transmit data.
RX0
RTS0#
CTS0#
DTR0#
100
I UART channel 0 Receive Data or infrared receive data. Normal RXD input
idles at logic 1 condition. The infrared pulses can be inverted internally prior
the decoder by FCTR[4].
95
O UART channel 0 Request to Send or general purpose output (active low).
This port may be used for one of two functions:
1) auto hardware flow control, see EFR bit-6, MCR bits-1 & 2, FCTR bits 0-3
and IER bit-6
2) RS485 half-duplex direction control, see FCTR bit-5, MCR bit-2 and MSR
bits 4-7.
99
I UART channel 0 Clear to Send or general purpose input (active low). It can be
used for auto hardware flow control, see EFR bit-7, MCR bit-2 and IER bit-7.
94
O UART channel 0 Data Terminal Ready or general purpose output (active low).
This port may be used one of two functions.
1) auto hardware flow control, see EFR bit-6, FCTR bits-0 to 3, MCR bits-0 &
2, and IER bit-6
2) RS485 half-duplex direction control, see FCTR bit-5, MCR bit-2 and MSR
bit 4-7.
DSR0#
CD0#
98
I UART channel 0 Data Set Ready or general purpose input (active low). It can
be used for auto hardware flow control, see EFR bit-7, MCR bit-2 and IER bit-
7.
97
I UART channel 0 Carrier Detect or general purpose input (active low).
3