XRD98L56 Datasheet, PDF (30/35 Pages) Exar Corporation – CCD Image Digitizers with CDS, PGA and 10-Bit A/D

XRD9855/9856
XRD98L55/98L56
General Power Supply and Board Design Issues
All of the GND pins, including DGND, should be con-
nected directly to the analog ground plane under the
XRD9855/XRD9856. The V_DD’s should be supplied
from a low noise, well filtered regulator which derives
the power supply voltage from the CCD power supply.
All of the V_DD pins are analog power supplies and
should be locally decoupled to the nearest GND pin with
a 0.1µF, high frequency capacitor. DV_DD is the power
supply for the digital outputs and should be locally
decoupled. DV_DD should be connected to the same
power supply network as the digital ASIC which re-
ceives data from the XRD9855/XRD9856.
In general, all traces leading to the XRD9855/XRD9856
should be as short as possible to minimize signal
crosstalk and high frequency digital signals from feed-
ing into sensitive analog inputs. The two CCD inputs,
In_Pos and In_Neg, should be routed as fully differen-
tial signals and should be shielded and matched.
Efforts should be made to minimize the board leakage
currents on In_Pos and In_Neg since these nodes are
AC coupled from the CCD to the XRD9855/XRD9856.
The digital output traces should be as short as possible
to minimize the capacitive loading on the output drivers
(see Figure 25)
12V
5V/3V
Regulator
CCD
AGND
VDD
DVDD
In_Neg
In_Pos
GND
DB[9:0]
DGND
XRD9855/XRD9856
DVDD
Digital
ASIC
DGN
D
5V/3V
Regulator
AGND
Figure 25. XRD9855/XRD9856 Power Supply Connections
Application Note
If increasing the PGA Gain to code 128 (80h) or higher
causes a larger than expected offset increase in the
ADC digital output codes, the problem may be due to
the limited Automatic Offest Calibration range. This
problem may be solved by increasing the Global Offset
code, V[1:0], in the Mode Register. The default is
V[1:0] = 01 (binary). Try increasing to V[1:0] = 10, or
V[1:0] = 11.
Rev. 1.01
For additional information on the XRD9855 feaures:
- Auto-detect
- EnableCal & Clamp Line Timing
- Clamp Only Line Timing
- Digital Clibration Loop
- Dark Voltage Calibration Range
Please see Application Notes XRDAN109,
XRDAN110, XRDAN112, XRDAN113 and
XRDAN114.
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