XRD98L56 Datasheet, PDF (11/35 Pages) Exar Corporation – CCD Image Digitizers with CDS, PGA and 10-Bit A/D

XRD9855/9856
XRD98L55/98L56
SYSTEM DESCRIPTION
Correlated Double Sample/Hold (CDS) &
Programmable Gain Amplifier (PGA); Gain [7:0]
The function of the CDS block, shown in Figure 2, is to
sense the voltage difference between the black level
and video level for each pixel. The CDS and PGA are
fully differential. The PGA output is converted to a
single ended signal, and then fed to the ADC. IN_POS
(CDS non-inverting input) should be connected, via a
capacitor, to the CCD "Common" voltage. This is
typically the CCD Reference output or ground. IN_NEG
(CDS inverting input) should be connected, via a ca-
pacitor, to the CCD output signal.
During the black reference phase of each pixel the
SDRK switches are turned on, shorting the PGA1
inputs to V_DD. The sampling edge of SHP turns off the
SDRK switches, sampling the black reference voltage
on capacitors C1 & C2.
During the video phase of each pixel the SPIX switches
are turned on. The difference between the pixel refer-
ence level and video level is transmitted through ca-
pacitors C1 & C2 and converted to a fully differential
signal by the differential amplifier PGA1. The sampling
edge of SHD turns off the SPIX switches, sampling the
pixel value on capacitors C3 & C4.
External
Coupling
Capacitors
CCD
Supply
CCD
Signal
CDS
VDD
SDRK
RSTCCD
In_Pos
C1
In_Neg
C2
CLAMP
VBIAS~0.8
+
PGA1
-
PGA
Gain
Register
SPIX
C3
Offset
Calibration
Enable Cal
ADC
Code
PGA2
C4
Rev. 1.01
Figure 2. Block Diagram of the CDS & PGA
11
BUF
to
ADC