XRD98L56 Datasheet, PDF (28/35 Pages) Exar Corporation – CCD Image Digitizers with CDS, PGA and 10-Bit A/D

XRD9855/9856
XRD98L55/98L56
CDS
TestVin
S1
PGA
ADC
Figure 21. Using TestVin to Access PGA Output & ADC Input
Mode Reg. AD1 AD0 V[1] V[0] M3
TestVin
1
0
0
0
0
Normal
1
0
0
0
0
M2 Test3 Test2
1
1
0
1
0
0
M1 Reset
0
0
0
0
Table 14. Serial Port Data to Use TestVin
CCD
Signal
RSTCCD
SHP
SHD
ADC Clock
(internal)
Track
ADC Data
Hold
CCD
Signal
RSTCCD
SHP
SHD
ADC Clock
(Internal)
Track
ADC Data
Hold
Figure 22. ADC Clock Generation,
CLK_POL=1, M2=0
Figure 23. ADC Clock Generation,
CLK_POL=1, M2=1
Rev. 1.01
28