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W77E532 Datasheet, PDF (16/86 Pages) Winbond – 8 BIT MICROCONTROLLER
W77E532/W77E532A
Port 1
Bit:
7
6
5
4
3
2
1
0
P1.7 P1.6 P1.5 P1.4 P1.3 P1.2 P1.1 P1.0
Mnemonic: P1
Address: 90h
P1.7−0: General purpose I/O port. Most instructions will read the port pins in case of a port read
access, however in case of read-modify-write instructions, the port latch is read. Some pins
also have alternate input or output functions. This alternate functions are described below:
P1.0 : T2 External I/O for Timer/Counter 2
P1.1 : T2EX Timer/Counter 2 Capture/Reload Trigger
P1.2 : RXD1 Serial Port 1 Receive
P1.3 : TXD1 Serial Port 1 Transmit
P1.4 : INT2 External Interrupt 2
P1.5 : INT3 External Interrupt 3
P1.6 : INT4 External Interrupt 4
P1.7 : INT5 External Interrupt 5
External Interrupt Flag
Bit:
7
6
5
4
3
2
1
0
IE5
IE4
IE3
IE2
-
-
-
-
Mnemonic: EXIF
Address: 91h
IE5: External Interrupt 5 flag. Set by hardware when a falling edge is detected on INT5 .
IE4: External Interrupt 4 flag. Set by hardware when a rising edge is detected on INT4.
IE3: External Interrupt 3 flag. Set by hardware when a falling edge is detected on INT3 .
IE2: External Interrupt 2 flag. Set by hardware when a rising edge is detected on INT2.
Port 4 Control Register A
Bit:
7
P41M1
6
P41M0
5
P41C1
4
P41C0
3
P40M1
2
P40M0
1
P40C1
0
P40C0
Mnemonic: P4CONA
Address: 92h
Port 4 Control Register B
Bit:
7
P43M1
6
P43M0
5
P43C1
4
P43C0
3
P42M1
2
P42M0
1
P42C1
0
P42C0
Mnemonic: P4CONB
Address: 93h
- 16 -
Publication Release Date: June 30, 2009
Revision A10