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LM3S2739 Datasheet, PDF (9/532 Pages) List of Unclassifed Manufacturers – Microcontroller
LM3S2739 Microcontroller
List of Figures
Figure 1-1. Stellaris® Fury-class High-Level Block Diagram ................................................................ 30
Figure 2-1. CPU Block Diagram ......................................................................................................... 38
Figure 2-2. TPIU Block Diagram ........................................................................................................ 39
Figure 5-1. JTAG Module Block Diagram ............................................................................................ 49
Figure 5-2. Test Access Port State Machine ....................................................................................... 52
Figure 5-3. IDCODE Register Format ................................................................................................. 57
Figure 5-4. BYPASS Register Format ................................................................................................ 58
Figure 5-5. Boundary Scan Register Format ....................................................................................... 58
Figure 6-1. External Circuitry to Extend Reset .................................................................................... 60
Figure 7-1. Hibernation Module Block Diagram ................................................................................. 114
Figure 8-1. Flash Block Diagram ...................................................................................................... 131
Figure 9-1. GPIODATA Write Example ............................................................................................. 156
Figure 9-2. GPIODATA Read Example ............................................................................................. 156
Figure 10-1. GPTM Module Block Diagram ........................................................................................ 197
Figure 10-2. 16-Bit Input Edge Count Mode Example .......................................................................... 201
Figure 10-3. 16-Bit Input Edge Time Mode Example ........................................................................... 202
Figure 10-4. 16-Bit PWM Mode Example ............................................................................................ 203
Figure 11-1. WDT Module Block Diagram .......................................................................................... 229
Figure 12-1. ADC Module Block Diagram ........................................................................................... 253
Figure 12-2. Internal Temperature Sensor Characteristic ..................................................................... 256
Figure 13-1. UART Module Block Diagram ......................................................................................... 286
Figure 13-2. UART Character Frame ................................................................................................. 287
Figure 13-3. IrDA Data Modulation ..................................................................................................... 289
Figure 14-1. SSI Module Block Diagram ............................................................................................. 325
Figure 14-2. TI Synchronous Serial Frame Format (Single Transfer) .................................................... 327
Figure 14-3. TI Synchronous Serial Frame Format (Continuous Transfer) ............................................ 328
Figure 14-4. Freescale SPI Format (Single Transfer) with SPO=0 and SPH=0 ...................................... 329
Figure 14-5. Freescale SPI Format (Continuous Transfer) with SPO=0 and SPH=0 .............................. 329
Figure 14-6. Freescale SPI Frame Format with SPO=0 and SPH=1 ..................................................... 330
Figure 14-7. Freescale SPI Frame Format (Single Transfer) with SPO=1 and SPH=0 ........................... 330
Figure 14-8. Freescale SPI Frame Format (Continuous Transfer) with SPO=1 and SPH=0 .................... 331
Figure 14-9. Freescale SPI Frame Format with SPO=1 and SPH=1 ..................................................... 332
Figure 14-10. MICROWIRE Frame Format (Single Frame) .................................................................... 332
Figure 14-11. MICROWIRE Frame Format (Continuous Transfer) ......................................................... 333
Figure 14-12. MICROWIRE Frame Format, SSIFss Input Setup and Hold Requirements ........................ 334
Figure 15-1. I2C Block Diagram ......................................................................................................... 359
Figure 15-2. I2C Bus Configuration .................................................................................................... 360
Figure 15-3. START and STOP Conditions ......................................................................................... 360
Figure 15-4. Complete Data Transfer with a 7-Bit Address ................................................................... 361
Figure 15-5. R/S Bit in First Byte ........................................................................................................ 361
Figure 15-6. Data Validity During Bit Transfer on the I2C Bus ............................................................... 361
Figure 15-7. Master Single SEND ...................................................................................................... 364
Figure 15-8. Master Single RECEIVE ................................................................................................. 365
Figure 15-9. Master Burst SEND ....................................................................................................... 366
Figure 15-10. Master Burst RECEIVE .................................................................................................. 367
Figure 15-11. Master Burst RECEIVE after Burst SEND ........................................................................ 368
June 04, 2007
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Preliminary