LM3S2739 Datasheet, PDF (19/532 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S2739 Microcontroller
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PWM2 Control (PWM2CTL), offset 0x0C0 ...................................................................... 465
PWM0 Interrupt and Trigger Enable (PWM0INTEN), offset 0x044 .................................... 466
PWM1 Interrupt and Trigger Enable (PWM1INTEN), offset 0x084 .................................... 466
PWM2 Interrupt and Trigger Enable (PWM2INTEN), offset 0x0C4 .................................... 466
PWM0 Raw Interrupt Status (PWM0RIS), offset 0x048 .................................................... 468
PWM1 Raw Interrupt Status (PWM1RIS), offset 0x088 .................................................... 468
PWM2 Raw Interrupt Status (PWM2RIS), offset 0x0C8 ................................................... 468
PWM0 Interrupt Status and Clear (PWM0ISC), offset 0x04C ........................................... 469
PWM1 Interrupt Status and Clear (PWM1ISC), offset 0x08C ........................................... 469
PWM2 Interrupt Status and Clear (PWM2ISC), offset 0x0CC ........................................... 469
PWM0 Load (PWM0LOAD), offset 0x050 ....................................................................... 470
PWM1 Load (PWM1LOAD), offset 0x090 ....................................................................... 470
PWM2 Load (PWM2LOAD), offset 0x0D0 ....................................................................... 470
PWM0 Counter (PWM0COUNT), offset 0x054 ................................................................ 471
PWM1 Counter (PWM1COUNT), offset 0x094 ................................................................ 471
PWM2 Counter (PWM2COUNT), offset 0x0D4 ............................................................... 471
PWM0 Compare A (PWM0CMPA), offset 0x058 ............................................................. 472
PWM1 Compare A (PWM1CMPA), offset 0x098 ............................................................. 472
PWM2 Compare A (PWM2CMPA), offset 0x0D8 ............................................................. 472
PWM0 Compare B (PWM0CMPB), offset 0x05C ............................................................. 473
PWM1 Compare B (PWM1CMPB), offset 0x09C ............................................................. 473
PWM2 Compare B (PWM2CMPB), offset 0x0DC ............................................................ 473
PWM0 Generator A Control (PWM0GENA), offset 0x060 ................................................ 474
PWM1 Generator A Control (PWM1GENA), offset 0x0A0 ................................................ 474
PWM2 Generator A Control (PWM2GENA), offset 0x0E0 ................................................ 474
PWM0 Generator B Control (PWM0GENB), offset 0x064 ................................................ 476
PWM1 Generator B Control (PWM1GENB), offset 0x0A4 ................................................ 476
PWM2 Generator B Control (PWM2GENB), offset 0x0E4 ................................................ 476
PWM0 Dead-Band Control (PWM0DBCTL), offset 0x068 ................................................ 477
PWM1 Dead-Band Control (PWM1DBCTL), offset 0x0A8 ................................................ 477
PWM2 Dead-Band Control (PWM2DBCTL), offset 0x0E8 ................................................ 477
PWM0 Dead-Band Rising-Edge Delay (PWM0DBRISE), offset 0x06C ............................. 478
PWM1 Dead-Band Rising-Edge Delay (PWM1DBRISE), offset 0x0AC ............................. 478
PWM2 Dead-Band Rising-Edge Delay (PWM2DBRISE), offset 0x0EC ............................. 478
PWM0 Dead-Band Falling-Edge-Delay (PWM0DBFALL), offset 0x070 ............................. 479
PWM1 Dead-Band Falling-Edge-Delay (PWM1DBFALL), offset 0x0B0 ............................. 479
PWM2 Dead-Band Falling-Edge-Delay (PWM2DBFALL), offset 0x0F0 ............................. 479
QEI ................................................................................................................................................. 480
Register 1: QEI Control (QEICTL), offset 0x000 ................................................................................ 485
Register 2: QEI Status (QEISTAT), offset 0x004 ................................................................................ 487
Register 3: QEI Position (QEIPOS), offset 0x008 .............................................................................. 488
Register 4: QEI Maximum Position (QEIMAXPOS), offset 0x00C ....................................................... 489
Register 5: QEI Timer Load (QEILOAD), offset 0x010 ....................................................................... 490
Register 6: QEI Timer (QEITIME), offset 0x014 ................................................................................. 491
Register 7: QEI Velocity Counter (QEICOUNT), offset 0x018 ............................................................. 492
Register 8: QEI Velocity (QEISPEED), offset 0x01C .......................................................................... 493
Register 9: QEI Interrupt Enable (QEIINTEN), offset 0x020 ............................................................... 494
Register 10: QEI Raw Interrupt Status (QEIRIS), offset 0x024 ............................................................. 495
June 04, 2007
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Preliminary