LM3S2739 Datasheet, PDF (3/532 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S2739 Microcontroller
Table of Contents
About This Document .................................................................................................................... 21
Audience .............................................................................................................................................. 21
About This Manual ................................................................................................................................ 21
Related Documents ............................................................................................................................... 21
Documentation Conventions .................................................................................................................. 21
1
1.1
1.2
1.3
1.4
1.4.1
1.4.2
1.4.3
1.4.4
1.4.5
1.4.6
1.4.7
Overview ............................................................................................................................. 23
Product Features ...................................................................................................................... 23
Target Applications .................................................................................................................... 29
High-Level Block Diagram ......................................................................................................... 29
Functional Overview .................................................................................................................. 30
ARM Cortex™-M3 ..................................................................................................................... 31
Motor Control Peripherals .......................................................................................................... 31
Serial Communications Peripherals ............................................................................................ 32
System Peripherals ................................................................................................................... 34
Memory Peripherals .................................................................................................................. 34
Additional Features ................................................................................................................... 35
Hardware Details ...................................................................................................................... 36
2
2.1
2.2
2.2.1
2.2.2
2.2.3
2.2.4
2.2.5
2.2.6
Cortex-M3 Core .................................................................................................................. 37
Block Diagram .......................................................................................................................... 38
Functional Description ............................................................................................................... 38
Serial Wire and JTAG Debug ..................................................................................................... 38
Embedded Trace Macrocell (ETM) ............................................................................................. 39
Trace Port Interface Unit (TPIU) ................................................................................................. 39
ROM Table ............................................................................................................................... 39
Memory Protection Unit (MPU) ................................................................................................... 39
Nested Vectored Interrupt Controller (NVIC) ................................................................................ 39
3
Memory Map ....................................................................................................................... 43
4
Interrupts ............................................................................................................................ 45
5
5.1
5.2
5.2.1
5.2.2
5.2.3
5.2.4
5.3
5.4
5.4.1
5.4.2
JTAG .................................................................................................................................... 48
Block Diagram .......................................................................................................................... 49
Functional Description ............................................................................................................... 49
JTAG Interface Pins .................................................................................................................. 50
JTAG TAP Controller ................................................................................................................. 51
Shift Registers .......................................................................................................................... 52
Operational Considerations ........................................................................................................ 52
Initialization and Configuration ................................................................................................... 55
Register Descriptions ................................................................................................................ 55
Instruction Register (IR) ............................................................................................................. 55
Data Registers .......................................................................................................................... 57
6
6.1
6.1.1
6.1.2
6.1.3
System Control ................................................................................................................... 59
Functional Description ............................................................................................................... 59
Device Identification .................................................................................................................. 59
Reset Control ............................................................................................................................ 59
Power Control ........................................................................................................................... 62
June 04, 2007
3
Preliminary