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LM3S2739 Datasheet, PDF (160/532 Pages) List of Unclassifed Manufacturers – Microcontroller
General-Purpose Input/Outputs (GPIOs)
The default register type for the GPIOCR register is RO for all GPIO pins, with the exception
of the five JTAG/SWD pins (PB7 and PC[3:0]). These five pins are currently the only
GPIOs that are protected by the GPIOCR register. Because of this, the register type for
GPIO Port B7 and GPIO Port C[3:0] is R/W.
The default reset value for the GPIOCR register is 0x0000.00FF for all GPIO pins, with the
exception of the five JTAG/SWD pins (PB7 and PC[3:0]). To ensure that the JTAG port
is not accidentally programmed as a GPIO, these five pins default to non-commitable.
Because of this, the default reset value of GPIOCR for GPIO Port B is 0x0000.007F while
the default reset value of GPIOCR for Port C is 0x0000.00F0.
Table 9-3. GPIO Register Map
Offset Name
Type
Reset
Description
0x000 GPIODATA
0x400 GPIODIR
0x404 GPIOIS
0x408 GPIOIBE
0x40C GPIOIEV
0x410 GPIOIM
0x414 GPIORIS
0x418 GPIOMIS
0x41C GPIOICR
0x420 GPIOAFSEL
0x500 GPIODR2R
0x504 GPIODR4R
0x508 GPIODR8R
0x50C GPIOODR
0x510 GPIOPUR
0x514 GPIOPDR
0x518 GPIOSLR
0x51C GPIODEN
0x520 GPIOLOCK
0x524 GPIOCR
0xFD0 GPIOPeriphID4
0xFD4 GPIOPeriphID5
0xFD8 GPIOPeriphID6
0xFDC GPIOPeriphID7
0xFE0 GPIOPeriphID0
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
W1C
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
-
RO
RO
RO
RO
RO
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
-
0x0000.00FF
0x0000.0000
0x0000.0000
0x0000.0000
-
0x0000.0000
0x0000.0000
-
0x0000.0001
-
0x0x0000.0000
0x0x0000.0000
0x0x0000.0000
0x0x0000.0000
0x0x0000.0061
GPIO Data
GPIO Direction
GPIO Interrupt Sense
GPIO Interrupt Both Edges
GPIO Interrupt Event
GPIO Interrupt Mask
GPIO Raw Interrupt Status
GPIO Masked Interrupt Status
GPIO Interrupt Clear
GPIO Alternate Function Select
GPIO 2-mA Drive Select
GPIO 4-mA Drive Select
GPIO 8-mA Drive Select
GPIO Open Drain Select
GPIO Pull-Up Select
GPIO Pull-Down Select
GPIO Slew Rate Control Select
GPIO Digital Enable
GPIO Lock
GPIO Commit
GPIO Peripheral Identification 4
GPIO Peripheral Identification 5
GPIO Peripheral Identification 6
GPIO Peripheral Identification 7
GPIO Peripheral Identification 0
See
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June 04, 2007
Preliminary