LM3S2739 Datasheet, PDF (283/532 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S2739 Microcontroller
Register 27: ADC Test Mode Loopback (ADCTMLB), offset 0x100
This register provides loopback operation within the digital logic of the ADC, which can be useful in
debugging software without having to provide actual analog stimulus. This test mode is entered by
writing a value of 0x0000.0001 to this register. When data is read from the FIFO in loopback mode,
the read-only portion of this register is returned.
Read-Only Register
ADC Test Mode Loopback (ADCTMLB)
Base 0x4003.8000
Offset 0x100
Type RO, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
CNT
CONT DIFF
TS
MUX
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:10
9:6
5
4
3
2:0
Name
reserved
CNT
CONT
DIFF
TS
MUX
Type
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Continuous sample counter that is initialized to 0 and counts each
sample as it processed. This helps provide a unique value for the data
received.
When set, indicates that this is a continuation sample. For example if
two sequencers were to run back-to-back, this indicates that the
controller kept continuously sampling at full rate.
When set, indicates that this is a differential sample.
When set, indicates that this is a temperature sensor sample.
Indicates which analog input is to be sampled.
Write-Only Register
ADC Test Mode Loopback (ADCTMLB)
Base 0x4003.8000
Offset 0x100
Type RO, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
LB
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
WO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
June 04, 2007
283
Preliminary