OXCB950 Datasheet, PDF (58/68 Pages) List of Unclassifed Manufacturers – Integrated High Performance UART Cardbus / PCI interface

OXFORD SEMICONDUCTOR LTD.
reset is hi-impedance. As the circuitry is disabled, the
transistor connected to the CCLKRUN# line is off and so
the state of the CCLKRUN# signal pin is controlled by the
host, which will be holding the pin in the asserted state
(clock running) as the inserted device needs to be
enumerated and configured. When the operating system
hands control to the custom device driver, the device driver
will assigned a logic '1' to the pin MIO0 to enable the clock
control circuitry which will begin to monitor the status of the
CCLKRUN# line.
While the host continues to assert the CCLKRUN# line, to
indicate clock run, the clock control circuitry continuously
samples logic '0' that results in the open-collector transistor
being held in the off-state.
CCLK
OXCB950
When the host intends on stopping the clock, it negates the
CCLKRUN# line by synchronously driving the CCLKRUN#
line to logic '1' and then releasing its drive to this line. This
will also result in the CCLKRUN# line being a logic '1' due
to the presence of a pull-up on the host end of the
interface.
When the clock control circuitry has sampled the negation
of the CCLKRUN# line for 2 samples, this results in the
open-collector transistor to be driven, thereby asserting the
CCLKRUN# line (this time by the target). In other words,
the clock control circuitry asserts the CCLKRUN# line 2
clocks after it had been negated by the host. This is the
required signalling to the host to prevent it from completing
its original intention of stopping the clock. The clock line
CCLK continues to run uninterrupted.
CCLKRUN#
Q1
Q2/
transistor
drive
CLKRUN# driven
by host. Clock
control circuitry
contains all 0’s
thus keeping
transistor off
Clock control
samples
CCLKRUN#
negated for 1
clock cycle
Host
synchronously
negates CCLKRUN# to
indicate intention of
stopping clock.
CCLK continues to run
Uninterrupted.
Clock
control
samples
CCLKRUN#
negated for 2 clock
cycles. Turns on
transistor to assert
CCLKRUN# line.
Clock control negates
drive to transistor, but
CCLKRUN# now held
asserted by the host
(during period transistor
was driven)
Data Sheet Revision 1.0 PRELIMINARY
Page 58