OXCB950 Datasheet, PDF (3/68 Pages) List of Unclassifed Manufacturers – Integrated High Performance UART Cardbus / PCI interface

OXFORD SEMICONDUCTOR LTD.
OXCB950
7.7.2 MODEM STATUS REGISTER ‘MSR’ ............................................................................................................................. 40
7.8 OTHER STANDARD REGISTERS ..................................................................................................................................... 40
7.8.1 DIVISOR LATCH REGISTERS ‘DLL & DLM’ ................................................................................................................. 40
7.8.2 SCRATCH PAD REGISTER ‘SPR’................................................................................................................................. 40
7.9 AUTOMATIC FLOW CONTROL......................................................................................................................................... 41
7.9.1 ENHANCED FEATURES REGISTER ‘EFR’................................................................................................................... 41
7.9.2 SPECIAL CHARACTER DETECTION ............................................................................................................................ 42
7.9.3 AUTOMATIC IN-BAND FLOW CONTROL ..................................................................................................................... 42
7.9.4 AUTOMATIC OUT-OF-BAND FLOW CONTROL........................................................................................................... 42
7.10 BAUD RATE GENERATION............................................................................................................................................... 43
7.10.1 GENERAL OPERATION ................................................................................................................................................. 43
7.10.2 CLOCK PRESCALER REGISTER ‘CPR’ ....................................................................................................................... 43
7.10.3 TIMES CLOCK REGISTER ‘TCR’................................................................................................................................... 43
7.10.4 EXTERNAL 1X CLOCK MODE....................................................................................................................................... 45
7.10.5 CRYSTAL OSCILLATOR CIRCUIT ................................................................................................................................ 45
7.11 ADDITIONAL FEATURES .................................................................................................................................................. 45
7.11.1 ADDITIONAL STATUS REGISTER ‘ASR’...................................................................................................................... 45
7.11.2 FIFO FILL LEVELS ‘TFL & RFL’ ..................................................................................................................................... 46
7.11.3 ADDITIONAL CONTROL REGISTER ‘ACR’ .................................................................................................................. 46
7.11.4 TRANSMITTER TRIGGER LEVEL ‘TTL’ ........................................................................................................................ 47
7.11.5 RECEIVER INTERRUPT. TRIGGER LEVEL ‘RTL’ ........................................................................................................ 47
7.11.6 FLOW CONTROL LEVELS ‘FCL’ & ‘FCH’...................................................................................................................... 47
7.11.7 DEVICE IDENTIFICATION REGISTERS ....................................................................................................................... 47
7.11.8 CLOCK SELECT REGISTER ‘CKS’ ............................................................................................................................... 48
7.11.9 NINE-BIT MODE REGISTER ‘NMR’............................................................................................................................... 48
7.11.10 MODEM DISABLE MASK ‘MDM’ .................................................................................................................................... 49
7.11.11 READABLE FCR ‘RFC’................................................................................................................................................... 49
7.11.12 GOOD-DATA STATUS REGISTER ‘GDS’ ..................................................................................................................... 49
7.11.13 DMA STATUS REGISTER ‘DMS’................................................................................................................................... 50
7.11.14 PORT INDEX REGISTER ‘PIX’....................................................................................................................................... 50
7.11.15 CLOCK ALTERATION REGISTER ‘CKA’....................................................................................................................... 50
8 SERIAL EEPROM SPECIFICATION ...........................................................................................51
8.1 EEPROM DATA ORGANISATION ..................................................................................................................................... 51
8.1.1 ZONE0: HEADER............................................................................................................................................................ 51
8.1.2 ZONE1 : POWER MANAGEMENT DATA, DATA_SCALE ZONE ................................................................................. 52
8.1.3 ZONE2: LOCAL CONFIGURATION REGISTER ZONE ................................................................................................ 53
8.1.4 ZONE 3 : CARDBUS INFORMATION STRUCTURE..................................................................................................... 53
8.1.5 ZONE4: PCI CONFIGURATION REGISTERS ............................................................................................................... 54
8.1.6 ZONE5: FUNCTION ACCESS ........................................................................................................................................ 55
9 COMPLIANCE TO PC CARD STANDARDS, 7.0 AND 7.1 ............................................................57
10 OPERATING CONDITIONS .....................................................................................................60
11 DC ELECTRICAL CHARACTERISTICS ...................................................................................61
11.1 NORMAL 3.3V I/O BUFFERS............................................................................................................................................. 61
11.2 5.0V TOLERANT I/O BUFFERS........................................................................................................................................ 61
11.3 DUAL MODE (CARDBUS/PCI) I/O BUFFERS ................................................................................................................. 62
12 POWER CONSUMPTION MEASUREMENTS ...........................................................................63
12.1 STATIC CURRENT CONSUMPTION ................................................................................................................................. 63
12.2 CURRENT CONSUMPTION IN APPLICATION ................................................................................................................. 63
13 TIMING WAVEFORMS............................................................................................................64
14 PHYSICAL PACKAGE DETAILS.............................................................................................66
Data Sheet Revision 1.1
Page 3