OXCB950 Datasheet, PDF (30/68 Pages) List of Unclassifed Manufacturers – Integrated High Performance UART Cardbus / PCI interface

OXFORD SEMICONDUCTOR LTD.
OXCB950
Register Address
Name
EFR
010
XON1
100
9-bit mode
XON2
101
9-bit mode
XOFF1
110
9-bit mode
XOFF2
111
9-bit mode
R/W Bit 7
Bit 6
Bit 5
Bit 4 Bit 3 Bit 2
Bit 1
Bit 0
To access these registers LCR must be set to 0xBF
R/W CTS
RTS Special Enhance
In-band flow control mode
flow
Flow
char
mode
control control detect
R/W
XON Character 1
Special character 1
R/W
XON Character 2
Special Character 2
R/W
XOFF Character 1
Special character 3
R/W
XOFF Character 2
Special character 4
Table 9: 650 Compatible Registers
Register
Name
ASR ^1,6,7
Address
001
R/W
R/W ⁷
RFL ⁶
011
R
Bit 7
Tx
Idle
Bit 6
FIFO
size
Bit 5
Bit 4 Bit 3 Bit 2
Bit 1
FIFO- Special DTR
RTS
SEL
Char
Detect
Number of characters in the receiver FIFO
Remote
Tx
Disabled
Bit 0
Tx
Disabled
TFL ^3,6
100
R
Number of characters in the transmitter FIFO
ICR ^3,8,9
101
R/W
Register access notes:
Data read/written depends on the value written to the SPR prior to
the access of this register (see Table 11)
Table 10: 950 Specific Registers
Note 1: Requires LCR[7] = 0
Note 2: Requires ACR[7] = 0
Note 3: Requires that last value written to LCR was not 0xBF
Note 4: To read this register ACR[7] must be = 0
Note 5: To read this register ACR[6] must be = 0
Note 6: Requires ACR[7] = 1
Note 7: Only bits 0 and 1 of this register can be written
Note 8: To read this register ACR[6] must be = 1
Note 9: This register acts as a window through which to read and write registers in the Indexed Control Register set
Data Sheet Revision 1.1
Page 30