OXCB950 Datasheet, PDF (13/68 Pages) List of Unclassifed Manufacturers – Integrated High Performance UART Cardbus / PCI interface

OXFORD SEMICONDUCTOR LTD.
6.2 Configuration space
The OXCB950 is a single function device, with one PCI
configuration space (and for the default cardbus mode, one
cardbus information structure).
All the required fields in the predefined PCI header region
have been implemented. This includes those fields in the
cardbus PC Card Standard that are termed “allocated” and
“reserved” for cardbus applications. This implementation is
a specific requirement for cardbus support in Windows 9x.
OXCB950
The device dependant region of the PCI configuration
space contains the cardbus/pci Power Management
Extended Capability register set and (for the cardbus mode
only) the Tuples making up the Cardbus Information
Structure.
The format of the PCI configuration space, for cardbus and
pci modes, is as shown in the Table below.
In general, writes to any registers that are not implemented
are ignored, and all reads from unimplemented registers
return 0.
6.2.1 Cardbus / PCI Configuration Space Register map
Configuration Register Description
31
16
15
0
Device ID
Vendor ID
Status
Command
Class Code
Revision ID
BIST¹
Header Type
Reserved
Reserved
Base Address Register 0 (BAR0) – UART Function in I/O space
Base Address Register 1 (BAR 1) - UART Function in Memory space
Base Address Register 2 (BAR 2) – Local Configuration Registers in IO space
Base Address Register 3 (BAR3) – Local Configuration Registers in Memory space
Base Address Register 4 (BAR4) – Cardbus Status Registers in Memory Space
Function Event : Offset +0
Function Event Mask : Offset +4
Function Present State : Offset +8
Function Force Event : Offset +12
Reserved (Bar 5)
Cardbus CIS Pointer
Subsystem ID
Subsystem Vendor ID
Reserved
Reserved
Cap_Ptr
Reserved
Reserved
Reserved
Interrupt Pin
Interrupt Line
Predefined PCI Header Region
Device Dependant PCI Region
Power Management Capabilities (PMC)
Reserved
Reserved
Tuple Byte3*
Tuple Byte 2*
…
Next Ptr
Cap_ID
PMC Control/Status Register (PMCSR)
Tuple Byte1*
Tuple Byte 0*
Tuple Byte (n+1)*
Tuple Byte n*
Offset
Address
00h
04h
08h
0Ch
10h
14h
18h
1Ch
20h
24h
28h
2Ch
30h
34h
38h
3Ch
40h
44h
48h
4Ch
* Tuples are available for the Cardbus mode only. These fields return all 0’s for the PCI mode of the device.
Table 2: Cardbus/PCI Configuration space
Data Sheet Revision 1.1
Page 13