OXCB950 Datasheet, PDF (5/68 Pages) List of Unclassifed Manufacturers – Integrated High Performance UART Cardbus / PCI interface

OXFORD SEMICONDUCTOR LTD.
OXCB950
A ‘wake-up’ event (the ‘power management event’) is requested via the PME# (PCI) or CSYSCHG (cardbus) pins from either of
the power states D2 or D3, by the UART line RI (for power state D3), and any modem line and the Serial Data In (for power state
D2).
Optional EEPROM:
The OXCB950 can be reconfigured from an external Microwire^TM based EEPROM. However, this is not required in many
applications as default values are provided for typical applications. Features available via the use of the EEPROM include
redefining device ID’s and vendor/sub-vendor ID fields in the PCI header space, cardbus-to-pci mode change, redefining Tuple
Information (relevant to cardbus applications only), and selectively enabling/disabling interrupts, powerdown and wakeup
requests.
2 BLOCK DIAGRAM
AD[31:0]
C/BE[3:0]
CLK
FRAME#
DEVSEL#
IRDY#
TRDY#
STOP#
PAR
SERR#
PERR#
RST#
IDSEL
INTA#
INTB#
PME#
SLEW_RATE
XTALO
XTALI
PCI
3.3V or
CardBus
Interface
Clock &
Baud rate
Generator
EE_DO
EE_DI
EE_CK
EE_CS
EEPROM
interface
Function 0
UART
SOUT
SIN
RTS
DTR
CTS
DSR
DCD
RI
Interrupt logic
MIO pins
MIO[1:0]
Data Sheet Revision 1.1
Page 5