OXCB950 Datasheet, PDF (23/68 Pages) List of Unclassifed Manufacturers – Integrated High Performance UART Cardbus / PCI interface

OXFORD SEMICONDUCTOR LTD.
OXCB950
6.6.3 Cardbus Power management
For cardbus mode, the cardbus status registers as given by
the tuple CISTPL_CONFIG_CB and located at the memory
base address register BAR4, are disabled (bypassed) by
default. This results in the power management behaviour
for the device in cardbus mode to be identical to the power
management behaviour for the device in the pci mode, with
the exception that the power management event (the
wakeup request) is available on the CSYSCHG pin for
cardbus modes and the PME# pin for pci modes.
The default setting means that all ‘powerdown’ and
‘wakeup’ requests, in the cardbus mode, have not been
conditioned by the 4 sets of registers making up the
cardbus status registers. For those applications that require
the cardbus status registers to be enabled, then the power
management logic for cardbus mode incurs the following
controls.
Since all powerdown requests are interrupt requests, then
powerdown requests on the device’s interrupt pin (CINT#)
will be controlled according to the INTR fields of the
cardbus status registers. That is, a powerdown request will
be asserted only if the INTR field in the Function Event
Mask Register has been set and the corresponding field in
the Function Event Register has detected a valid (internal)
power down request. Similarly, the wakeup (power
management events) are controlled by the GWAKE/WKUP
fields in the cardbus status registers. A ‘wakeup’ event for
cardbus applications will only be invoked if the
GWAKE/WKUP fields in the Function Event Mask Register
have been enabled and the GWAKE field in the Function
Event Register has detected a ‘wakeup’ request. Note that
these controls are on top of the controls for ‘powerdown’
and ‘wakeup’ requests as given in the local configuration
registers.
Specifically for the generation of ‘wake-up’ events, the PC
Card Standard notes that in an ACPI operating system,
there is no cardbus device driver and so, in order to
support power management events the PME_EN bit in the
PCI configuration region must support generating a
CSYSCHG signal for a cardbus card. PME_en must make
the cardbus card power management functionality act as if
the cardbus card were a standard PCI device.
To achieve this effect when the cardbus status registers
are enabled, when the operating system sets the PME_En
bit true (in the PCI power management register block) this
action also sets true the GWAKE bit (bit4) and the WKUP
bit (bit14) fields in the Cardbus Function Event Mask
Register. This ensures that any recognised wakeup events
allow the assertion of the CSYSCHG line. Setting the
PME_En bit false, also clears the GWAKE and WKUP bits
in the Function Event Mask Register to deassert or inhibit
the power management on the CSYSCHG line.
Once the PME_En bit is set, the function targets the
GWAKE bit in the Function Event Register as the function’s
general wakeup event. When enabled (PME_En true) any
wakeup events are latched into the PME_status and the
cardbus card’s GWAKE bit in the Function Event register.
Clearing the GWAKE/WKUP fields in the Function Event
Mask Register, to disable wakeup events on the CSYCHG
pin, does not clear the PME_En bit in the PCI power
management register block. Writing a ‘1’ to the
PME_status bit of the PCI power management register
block will clear the GWAKE bit in the Function Event
register deasserting the CSYSCHG event. Clearing the
GWAKE bit in the Function Event register, by writing a ‘1’,
clears the PME_status bit in the PMCSR register.
These actions are sumarised below (taken from table 6-2 of the PC card standard)
Cardbus PCI
Configuration Space
PME_En
Default 0
Written 1
1
1
Written 0
Don’t Care
No effect
ACPI Operating System
Function Event Mask Function Event
Register
Register
GWAKE / WKUP
GWAKE
Default 0 / Default 0
Defualt 0
Follows PME_en
0
1/ 1
0
1/1
1(detected wakeup
event)
Follows PME_en
1
Don’t care/ Don’t care
0
Non-ACPI Operating System
Per cardbus electrical sepcification
Cardbus pin
CSYSCHG
Default 0
0
0
1
0
0
Cardbus PCI
configuration Space
PME_status
Default 0
0
0
Latches wakeup
(CSYSCHG) event
No effect
Data Sheet Revision 1.1
Page 23